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PIC24F16KA102T-E Datenblatt(PDF) 273 Page - Microchip Technology |
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PIC24F16KA102T-E Datenblatt(HTML) 273 Page - Microchip Technology |
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273 / 278 page ![]() 2008-2011 Microchip Technology Inc. DS39927C-page 273 PIC24F16KA102 FAMILY M Microchip Internet Web Site ............................................. 275 MPLAB ASM30 Assembler, Linker, Librarian .................. 204 MPLAB Integrated Development Environment Software .............................................. 203 MPLAB PM3 Device Programmer ................................... 206 MPLAB REAL ICE In-Circuit Emulator System ................ 205 MPLINK Object Linker/MPLIB Object Librarian ............... 204 N Near Data Space ............................................................... 32 O Oscillator Configuration Bit Values for Clock Selection .................................... 92 Clock Switching .......................................................... 97 Sequence ........................................................... 97 CPU Clocking Scheme .............................................. 92 Initial Configuration on POR ...................................... 92 Reference Clock Output ............................................. 98 Output Compare Continuous Output Pulse Generation ...................... 125 Single Output Pulse Generation .............................. 125 P Packaging Details ...................................................................... 253 Marking .................................................................... 251 Pinout Descriptions ...................................................... 13–16 Power-Saving Features ................................................... 101 Clock Frequency, Clock Switching ........................... 101 Instruction-Based Modes ......................................... 101 Deep Sleep ...................................................... 102 Idle ................................................................... 102 Sleep ................................................................ 101 Product Identification System .......................................... 277 Program and Data Memory Access Using Table Instructions ................................ 43 Program Space Visibility ............................................ 44 Program and Data Memory Spaces Interfacing, Addressing .............................................. 41 Program Memory Address Space ........................................................... 29 Configuration Word Addresses .................................. 30 Memory Map .............................................................. 29 Program Verification ........................................................ 202 Programmable Cyclic Redundancy Check (CRC) Generator ................................................................. 167 Pulse-Width Modulation. See PWM. R Reader Response ............................................................ 276 Register Maps A/D ............................................................................. 38 Clock Control ............................................................. 40 CPU Core ................................................................... 33 CRC ........................................................................... 39 CTMU ......................................................................... 38 Deep Sleep ................................................................ 40 Dual Comparator ........................................................ 39 I2C .............................................................................. 36 ICN ............................................................................. 34 Input Capture ............................................................. 35 Interrupt Controller ..................................................... 34 NVM ........................................................................... 40 Output Compare ........................................................ 35 Pad Configuration ...................................................... 37 PMD ........................................................................... 40 PORTA ...................................................................... 37 PORTB ...................................................................... 37 RTCC ......................................................................... 39 SPI ............................................................................. 36 Timer ......................................................................... 35 UART ......................................................................... 36 Registers AD1CHS (A/D Input Select) ..................................... 178 AD1CON1 (A/D Control 1) ....................................... 175 AD1CON2 (A/D Control 2) ....................................... 176 AD1CON3 (A/D Control 3) ....................................... 177 AD1CSSL (A/D Input Scan Select, Low) ................. 180 AD1PCFG (A/D Port Configuration) ........................ 179 ALCFGRPT (Alarm Configuration) .......................... 159 ALMINSEC (Alarm Minutes and Seconds Value) ............................................... 163 ALMTHDY (Alarm Month and Day Value) ............... 162 ALWDHR (Alarm Weekday and Hours Value) ........ 162 CLKDIV (Clock Divider) ............................................. 95 CMSTAT (Comparator Status) ................................ 186 CMxCON (Comparator x Control) ........................... 185 CORCON (CPU Control) ..................................... 27, 68 CRCCON (CRC Control) ......................................... 169 CRCXOR (CRC XOR Polynomial) .......................... 170 CTMUCON (CTMU Control) .................................... 191 CTMUICON (CTMU Current Control) ...................... 192 CVRCON (Comparator Voltage Reference Control) .......................................... 188 DEVID (Device ID) ................................................... 200 DEVREV (Device Revision) ..................................... 200 DSCON (Deep Sleep Control) ................................. 105 DSWAKE (Deep Sleep Wake-up Source) ............... 106 FBS (Boot Segment Configuration) ......................... 193 FDS (Deep Sleep Configuration) ............................. 199 FGS (General Segment Configuration) ................... 194 FICD (In-Circuit Debugger Configuration) ............... 198 FOSC (Oscillator Configuration) .............................. 195 FOSCSEL (Oscillator Selection Configuration) ....... 194 FPOR (Reset Configuration) ................................... 197 FWDT (Watchdog Timer Configuration) .................. 196 HLVDCON (High/Low-Voltage Detect Control) ....... 172 I2C1CON (I2C1 Control) ......................................... 142 I2C1MSK (I2C1 Slave Mode Address Mask) .......... 146 I2C1STAT (I2C1 Status) .......................................... 144 IC1CON (Input Capture 1 Control) .......................... 124 IEC0 (Interrupt Enable Control 0) .............................. 75 IEC1 (Interrupt Enable Control 1) .............................. 76 IEC3 (Interrupt Enable Control 3) .............................. 77 IEC4 (Interrupt Enable Control 4) .............................. 78 IFS0 (Interrupt Flag Status 0) .................................... 71 IFS1 (Interrupt Flag Status 1) .................................... 72 IFS3 (Interrupt Flag Status 3) .................................... 73 IFS4 (Interrupt Flag Status 4) .................................... 74 INTCON1 (Interrupt Control 1) .................................. 69 INTCON2 (Interrupt Control 2) .................................. 70 INTTREG Interrupt Control and Status ...................... 89 IPC0 (Interrupt Priority Control 0) .............................. 79 IPC1 (Interrupt Priority Control 1) .............................. 80 IPC15 (Interrupt Priority Control 15) .......................... 86 IPC16 (Interrupt Priority Control 16) .......................... 87 IPC18 (Interrupt Priority Control 18) .......................... 88 IPC19 (Interrupt Priority Control 19) .......................... 88 |
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