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PIC24F16KA102T-E Datenblatt(PDF) 274 Page - Microchip Technology |
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PIC24F16KA102T-E Datenblatt(HTML) 274 Page - Microchip Technology |
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274 / 278 page ![]() PIC24F16KA102 FAMILY DS39927C-page 274 2008-2011 Microchip Technology Inc. IPC2 (Interrupt Priority Control 2) .............................. 81 IPC3 (Interrupt Priority Control 3) .............................. 82 IPC4 (Interrupt Priority Control 4) .............................. 83 IPC5 (Interrupt Priority Control 5) .............................. 84 IPC7 (Interrupt Priority Control 7) .............................. 85 MINSEC (RTCC Minutes and Seconds Value) ........ 161 MTHDY (RTCC Month and Day Value) ................... 160 NVMCON (Flash Memory Control) ............................ 47 NVMCON (Nonvolatile Memory Control) ................... 52 OC1CON (Output Compare 1 Control) .................... 129 OSCCON (Oscillator Control) .................................... 93 OSCTUN (FRC Oscillator Tune) ................................ 96 PADCFG1 (Pad Configuration Control) ...................... 130, 146, 158 PMD1 (Peripheral Module Disable 1) ...................... 108 PMD2 (Peripheral Module Disable 2) ...................... 109 PMD3 (Peripheral Module Disable 3) ...................... 110 PMD4 (Peripheral Module Disable 4) ...................... 111 RCFGCAL (RTCC Calibration and Configuration) .................................................. 157 RCON (Reset Control) ............................................... 58 REFOCON (Reference Oscillator Control) ................. 99 SPI1CON1 (SPI1 Control 1) .................................... 136 SPI1CON2 (SPI1 Control 2) .................................... 137 SPI1STAT (SPI1 Status and Control) ...................... 134 SR (ALU STATUS) .............................................. 26, 67 T1CON (Timer1 Control) .......................................... 116 T2CON (Timer2 Control) .......................................... 120 T3CON (Timer3 Control) .......................................... 121 UxMODE (UARTx Mode) ......................................... 150 UxRXREG (UARTx Receive) ................................... 154 UxSTA (UARTx Status and Control) ........................ 152 UxTXREG (UARTx Transmit) .................................. 154 WKDYHR (RTCC Weekday and Hours Value) ........ 161 YEAR (RTCC Year Value) ....................................... 160 Resets Clock Source Selection .............................................. 60 Delay Times for Various Device Resets .................... 60 Device Times ............................................................. 60 RCON Flags Operation .............................................. 59 SFR States ................................................................. 61 Revision History ............................................................... 269 RTCC ............................................................................... 155 Alarm Configuration ................................................. 164 Alarm Mask Settings (figure) .................................... 165 Calibration ................................................................ 164 Register Mapping ..................................................... 156 Source Clock ............................................................ 155 Selection .......................................................... 156 Write Lock ................................................................ 156 S Selective Peripheral Power Control ................................. 107 Serial Peripheral Interface. See SPI. SFR Space ......................................................................... 32 Software Simulator (MPLAB SIM) .................................... 205 Software Stack ................................................................... 41 T Timer1 .............................................................................. 115 Timer2/3 ........................................................................... 117 Timing Diagrams Baud Rate Generator Output ........................... 239, 240 Brown-out Reset Characteristics ............................. 219 CLKO and I/O Timing .............................................. 236 External Clock .......................................................... 232 I2C Bus Data (Master Mode) ................................... 240 I2C Bus Data (Slave Mode) ..................................... 242 I2C Bus Start/Stop Bits (Master Mode) .................... 240 I2C Bus Start/Stop Bits (Slave Mode) ...................... 242 Input Capture ........................................................... 244 Output Compare ...................................................... 244 PWM Requirements ................................................. 245 Reset, Watchdog Timer. Oscillator Start-up Timer, Power-up Timer Characteristics ........... 238 SPIx Master Mode (CKE = 0) .................................. 246 SPIx Master Mode (CKE = 1) .................................. 247 SPIx Slave Mode (CKE = 0) .................................... 248 SPIx Slave Mode (CKE = 1) .................................... 249 Start Bit Edge Detection .......................................... 243 Timing Requirements CLKO and I/O .......................................................... 236 External Clock .......................................................... 232 I2C Bus Data (Master Mode) ........................... 240, 241 I2C Bus Data (Slave Mode) ..................................... 243 I2C Bus Start/Stop Bit (Slave Mode) ........................ 242 PLL Clock Specifications ......................................... 233 PWM ........................................................................ 245 SPIx Master Mode (CKE = 0) .................................. 246 SPIx Master Mode (CKE = 1) .................................. 247 SPIx Slave Mode (CKE = 0) .................................... 248 SPIx Slave Mode (CKE = 1) .................................... 249 U UART ............................................................................... 147 Baud Rate Generator (BRG) ................................... 148 Break and Sync Transmit Sequence ....................... 149 IrDA Support ............................................................ 149 Operation of UxCTS and UxRTS Control Pins ........ 149 Receiving in 8-Bit or 9-Bit Data Mode ...................... 149 Transmitting in 8-Bit Data Mode .............................. 149 Transmitting in 9-Bit Data Mode .............................. 149 W Watchdog Timer Deep Sleep (DSWDT) ............................................. 202 Watchdog Timer (WDT) ................................................... 201 Windowed Operation ............................................... 201 WWW Address ................................................................ 275 WWW, On-Line Support ...................................................... 8 |
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