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LM4935RLEVAL Datenblatt(PDF) 39 Page - Texas Instruments |
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LM4935RLEVAL Datenblatt(HTML) 39 Page - Texas Instruments |
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39 / 91 page ![]() 0 24 23 22 21 3 2 1 0 24 23 22 21 3 2 1 0 24 I2S_CLK I2S_SDO/ I2S_SDI I2S_WS Left Word Right Word LM4935, LM4935RLEVAL www.ti.com SNAS296D – OCTOBER 2005 – REVISED MARCH 2006 4.2.31 AUDIO INTERFACE CONFIGURATION REGISTER This register is used to control the configuration of the audio data interfaces. Table 4-31. AUDIO_IF (0x19h) Bits Field Description 1:0 AUDIO_IF_MODE Selects the function of the 6 audio interface IOs. AUDIO_IF_MODE I2S_ I2S_ I2S_ I2S_ GPIO_1 GPIO_2 CLK pin WS pin SDI pin SDO pin pin pin 002 I2S I2S I2S I2S GPIO GPIO CLK WS SDI SDO 1 2 012 PCM PCM - PCM GPIO GPIO CLK SYNC SDO 1 2 102 PCM PCM PCM PCM GPIO GPIO CLK SYNC SDI SDO 1 2 112 I2S I2S I2S PCM PCM PCM CLK WS SDI SDO CLK SYNC 2 I2S_WS_MS If set the I2S_WS is produced by the LM4935 and the I2S_WS pin will be an output. 3 I2S_CLK_MS If set the I2S_CLK is produced by the LM4935 and the I2S_CLK pin will be an output. 4 PCM_SYNC_MS If set the PCM_SYNC is produced by the LM4935 and the relevant pin will be an output. 5 PCM_CLK_MS If set the PCM_CLK is produced by the LM4935 and the relevant pin will be an output. 7:6 I2S_SDO_DATA The two ADCs on the LM4935 can both be read via the isochronous I2S interface. The most recent valid sample is output from the following source: (Please refer to Table 4-32 for more information on SAR_CH_SEL) I2S_SDO_DATA LEFT RIGHT 002 AUDIO ADC SAR_CH_SEL 012 SAR VSAR 1 SAR_CH_SEL 102 SAR VSAR 2 SAR_CH_SEL 112 A_VDD/2 SAR_CH_SEL 4.2.32 DIGITAL AUDIO DATA FORMATS I2S master mode can only be used when the DAC is enabled unless the ADC_I2S_M bit is set. PCM Master mode can only be used when the ADC is enabled. If the PCM receiver interface is operated in slave mode the clock and sync should be enabled at the same time as the PCM receiver uses the first PCM frame to calculate the PCM interface format. This format can not be changed unless a soft reset is issued. It is strongly recommended that the LM4935 is operated in master mode as this eliminates the risk of sample rate mismatch between the data converters and the audio interfaces. In master mode the I2S_CLK has a 60/40 duty cycle and a frequency of 50*fs. In slave mode the PCM and I2S receivers only record the 1st 16 and 18 bits of the serial words respectively. The I2S format is as follows: Figure 4-14. I2S Serial Data Format (Default Mode) Copyright © 2005–2006, Texas Instruments Incorporated Application Information 39 Submit Documentation Feedback Product Folder Links: LM4935 LM4935RLEVAL |
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