IDT71B74

BiCMOS STATIC RAM 64K (8K x 8-BIT) CACHE-TAG RAM

COMMERCIAL TEMPERATURE RANGE

14.1

8

± 10%)

71B74S8

71B74S10

71B74S12

71B74S15

71B74S20

Symbol

Parameter

Min.

Max.

Min.

Max.

Min.

Max.

Min.

Max.

Min.

Max.

Unit

Reset Cycle

(1)

Reset Pulse Width

30

—

35

—

35

—

40

—

45

—

ns

WE HIGH to Reset HIGH

5

—

5

—

5

—

5

—

5

—

ns

Reset HIGH to

WE LOW

25

—

25

—

25

—

30

—

30

—

ns

(2)

Power On Reset

100

—

100

—

100

—

120

—

120

—

ns

NOTES:

3013 tbl 13

1. Recommended duty cycle = 10% maximum.

2. This parameter is guaranteed with the AC Load (Figure 1) by device characterization, but is not production tested.

NOTES:

1. It is not recommended to float data and address input pins while the MATCH pin is active.

2. Transition is measured at

±200mV from steady state.

RESET TIMING

3013 drw 14

RESET

WE

ADDRESS

DATA

3013 drw 13

OE

WE

VALID READ DATA

VALID MATCH

DATA

MATCH VALID

MATCH

NO MATCH

MATCH

RESET

CS

(2)

(2)

(2)

(2)