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PM0215 Datenblatt(PDF) 14 Page - STMicroelectronics |
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PM0215 Datenblatt(HTML) 14 Page - STMicroelectronics |
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14 / 91 page ![]() The STM32 Cortex-M0 processor PM0215 14/91 Doc ID 022979 Rev 1 Application program status register Contains the current state of The condition flags from previous instruction executions. See the register summary in Table 3 on page 12 for its attributes. Interrupt program status register Contains the exception type number of the current Interrupt Service Routine (ISR). See the register summary in Table 3 on page 12 for its attributes. Table 5. APSR bit definitions Bits Description Bit 31 N: Negative or less than flag: 0: Operation result was positive, zero, greater than, or equal 1: Operation result was negative or less than. Bit 30 Z: Zero flag: 0: Operation result was not zero 1: Operation result was zero. Bit 29 C: Carry or borrow flag: 0: Add operation did not result in a carry bit or subtract operation resulted in a borrow bit 1: Add operation resulted in a carry bit or subtract operation did not result in a borrow bit. Bit 28 V: Overflow flag: 0: Operation did not result in an overflow 1: Operation resulted in an overflow. Bits 27:0 Reserved. Table 6. IPSR bit definitions Bits Description Bits 31:6 Reserved Bits 5:0 ISR_NUMBER: This is the number of the current exception, see Exception types on page 22 for more information: 0: Thread mode 1: Resetrved 2: NMI 3: Hard fault 4-10: Reserved 11: SVCall 12: Reserved 13: Reserved 14: PendSV 15: SysTick/Reserved 16: IRQ0 .... 47: IRQ31 (see STM32 product reference manual/datasheet for interrupt mapping information) 48-63: Reserved |
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