LTC1277CS datasheet(5/20 Pages) LINER

5 / 20 page

LTC1274/LTC1277

(Note 5) See Figures 13 to 17.

TI I G CHARACTERISTICS

SYMBOL

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

t16

HBEN

↓ to Low Byte Data Valid

CL = 100pF (LTC1277 Only)

100

t17

HBEN

↑ to RD↓ Setup Time

(Note 10) (LTC1277 Only)

t18

↑ to HBEN↓ Setup Time

(Note 10) (LTC1277 Only)

The q denotes specifications which apply over the full operating

temperature range; all other limits and typicals TA = 25°C.

Note 1: Absolute Maximum Ratings are those values beyond which the life

of a device may be impaired.

Note 2: All voltage values are with respect to ground with DGND and

AGND wired together and VLOGIC is tied to VDD in LTC1277 (unless

otherwise noted).

Note 3: When these pin voltages are taken below VSS (ground for unipolar

mode) or above VDD, they will be clamped by internal diodes. This product

can handle input currents greater than 60mA below VSS (ground for

unipolar mode) or above VDD without latch-up.

Note 4: When these pin voltages are taken below VSS (ground for unipolar

mode), they will be clamped by internal diodes. This product can handle

input currents greater than 60mA below VSS (ground for unipolar mode)

without latch-up. These pins are not clamped to VDD.

Note 5: VDD = 5V (VSS = – 5V for bipolar mode), VLOGIC = VDD (LTC1277),

fSAMPLE = 100ksps, tr = tf = 5ns unless otherwise specified.

Note 6: Linearity, offset and full-scale specifications apply for unipolar and

bipolar modes.

Note 7: Integral nonlinearity is defined as the deviation of a code from a

straight line passing through the actual endpoints of the transfer curve.

The deviation is measured from the center of the quantization band.

Note 8: For LTC1274, bipolar offset is the offset voltage measured from

– 0.5LSB when the output code flickers between 0000 0000 0000 and

1111 1111 1111. For LTC1277, bipolar offset voltage is measured from

– 0.5LSB when the output code flickers between 0111 1111 1111 and

1000 0000 0000.

Note 9: The AC tests apply to bipolar mode only and the S/(N + D) is 71dB

(typ) for unipolar mode at 100kHz input frequency.

Note 10: Guaranteed by design, not subject to test.

Note 11: Recommended operating conditions.

Note 12: AIN must not exceed VDD or fall below VSS by more than 50mV to

specified accuracy.

Note 13: The falling CONVST edge starts a conversion. If CONVST returns

high at a bit decision point during the conversion it can create small

errors. For best performance ensure that CONVST returns high either

within 400ns after conversion start (i.e., before the first bit decision) or

after BUSY rises (i.e., after the last bit test). See timing diagrams Modes

1a and 1b (Figures 13, 14).

TYPICAL PERFORMANCE CHARACTERISTICS

Integral Nonlinearity vs

Output Code

OUTPUT CODE

–1.00

–0.50

0.50

1.00

512 1024 1536 2048

LT1274/77 • TPC01

2560 3072 3584 4096

fSAMPLE = 100kHz

INPUT FREQUENCY (Hz)

10k

100k

LTC1274/77 • TPC03

fSAMPLE = 100kHz

NYQUIST

FREQUENCY

OUTPUT CODE

–1.00

–0.50

0.50

1.00

512 1024 1536 2048

LT1274/77 • TPC02

2560 3072 3584 4096

fSAMPLE = 100kHz

Differential Nonlinearity vs

Output Code

ENOBs and S/(N + D) vs

Input Frequency

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