LTC1654IGN datasheet(7/12 Pages) LINER

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LTC1654

Power Down

Each DAC can also be independently powered down to less

than 5

µA/DAC of supply current. The reference pin also

goes into a high impedance state when the DAC is powered

down and the reference current will drop to below 0.1

µA.

The amplifiers’ output stage is also three-stated but the

OPERATION

Table 1.

CONTROL

0000

Load Input Register n

0001

Update (Power-Up) DAC Register n

0010

Load Input Register n, Update (Power-Up) All

0011

Load and Update n

0100

Power Down n

0101

Fast n (Speed States are Maintained Even If DAC is

Put in Power-Down Mode)

0110

Slow n (Default State is Slow When Supplies are

Powered Up)

0111

Reserved (Do Not Use)

1000

Reserved (Do Not Use)

1001

Reserved (Do Not Use)

1010

Reserved (Do Not Use)

1011

Reserved (Do Not Use)

1100

Reserved (Do Not Use)

1101

Reserved (Do Not Use)

1110

Reserved (Do Not Use)

1111

No Operation

VOUT pins still have the internal gain-setting resistors

connected to them resulting in an effective resistance from

VOUT to REFLO. This resistance is typically 90k when the

X1/X1/2 pin is tied to VOUT and 36k when X1/X1/2 is tied to

REFLO. Because of this resistance, VOUT will go to VREFLO

when the DAC is powered down and VOUT is unloaded.

ADDRESS (n)

0000

DAC A

0001

DAC B

0010

Reserved (Do Not Use)

0011

Reserved (Do Not Use)

0100

Reserved (Do Not Use)

0101

Reserved (Do Not Use)

0110

Reserved (Do Not Use)

0111

Reserved (Do Not Use)

1000

Reserved (Do Not Use)

1001

Reserved (Do Not Use)

1010

Reserved (Do Not Use)

1011

Reserved (Do Not Use)

1100

Reserved (Do Not Use)

1101

Reserved (Do Not Use)

1110

Reserved (Do Not Use)

1111

Both DACs

INPUT WORD

CONTROL

ADDRESS

DATA (14 + 2 DUMMY LSBs)

D13 D12 D11 D10 D9

D6 D5

1654 TABLE

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