8

Receiver Optical Characteristics

The following characteristics are defined over the Recommended Operating Conditions unless otherwise noted. Typical

values are for Tc = 40˚C, Vcc = 3.3 V

Parameter

Test Point*

Min

Typ

Max

Units

Notes/Conditions

Center wavelength 1

TP3

850

nm

Center wavelength 2

TP3

900

nm

TP3

+7.0

dBm

Maximum Average power at receiver input, each

lane (overload)

TP3

+5.0

dBm

Transceiver Reflectance

TP3

-15

dB

Peak power, each lane

TP3

7

dBm

Optical Modulation Amplitude (OMA), 850nm

lane (unstressed sensitivity)

TP3

-7.1

dBm

BER = 1e-12

Optical Modulation Amplitude (OMA), 900nm

lane (unstressed sensitivity)

TP3

-7.7

dBm

BER = 1e-12

Stressed receiver sensitivity in OMA, 850nm lane

TP3

-4.5

-3.83

dBm

BER = 1e-12

Stressed receiver sensitivity in OMA, 900nm lane

TP3

-4.5

-3.86

dBm

BER = 1e-12

TP3

Vertical Eye Closure Penalty, 850nm

TP3

2.4

dB

Vertical Eye Closure Penalty, 900nm

TP3

3.1

dB

Stressed eye Jitter, each lane

TP3

0.13

UI

LOS Assert

TP3

-30

-9.1

dBm

LOS De-Assert (850nm)

TP3

-8.6

dBm

LOS De-Assert (900nm)

TP3

-8.6

dBm

LOS Hysteresis

TP3

0.5

dB

* See Figure 6 for Test Point definitions.

Notes:

1. The receiver shall be able to tolerate, without damage, continuous exposure to a modulated optical input signal having this power level on one

lane. The receiver does not have to operate correctly at this input power.

2. Vertical eye closure penalty and stressed eye jitter are test conditions for measuring stressed receiver sensitivity. They are not characteristics of the

receiver.

TP0: Host ASIC transmitter output at ASIC package contact on the Host board

TP1: Host ASIC transmitter output across the Host Board at the input side of the Host QSFP+ electrical connector

TP2: QSFP+ transmitter LC Duplex optical output at the end of a 2m to 5m patch cord

TP3: QSFP+ receiver LC Duplex optical input at the end of the fiber

TP4a: QSFP+ receiver electrical output at the input side of the Host QSFP+ electrical connector

TP4: QSFP+ receiver electrical output at the output side of the Host QSFP+ electrical connector

TP5: Host ASIC receiver input at ASIC package contact on the Host board

Figure 6. Test point definitions

QSFP + RX

QSFP + TX

Fiber

TP 5

TP 4a

TP 2

TP 1a

TP 4

TP 0

TP 1

TP 3

ASIC/

SerDes

ASIC/

SerDes