SM5902AF datasheet(25/40 Pages) NPC

Teilenummer	SM5902AF

Bauteilbeschribung	compression and non compression type shock-proof memory controller

PDF	40 Pages

Scroll/Zoom	100%

Hersteller	NPC [Nippon Precision Circuits Inc]

Direct Link	http://www.npc.co.jp/en

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25 / 40 page

NIPPON PRECISION CIRCUITS-25

SM5902AF

Correct data demodulation becomes impossible for

the CD signal processor IC when a disturbance

exceeding the RAM jitter margin occurs. The

YFLAG signal input pin is used to indicate when

such a condition has occurred.

The YFCLK is a 7.35 kHz clock synchronized to the

CD format frame 1.

The IC checks the YFLAG input and stops the

encode sequence when such a disturbance has

occurred, and then makes FLAG6 active.

The YFLAG check method used changes depend-

ing on the YFLGS flag and YFCKP flag (85H com-

mand). See table1.

If YFLAGS is set to 1, then YFCLK should be tied

either High or Low.

YFLAG, YFCLK, FLAG6

85H command

YFLGS

YFCKP

FLAG6 set conditions

FLAG6 reset conditions

When YFLAG=LOW on YFCLK input falling edge

- By status read (90H command)

When YFLAG=LOW on YFCLK input rising edge

- When MSON=LOW

When YFLAG=LOW

YFCLK be tied either High or Low

- After system reset

When YFLAG=HIGH

Table 1. YFLAG signal check method

SM5902AF Datenblatt(PDF) 25 Page - Nippon Precision Circuits Inc