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USB3813 Datenblatt(PDF) 11 Page - Microchip Technology |
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USB3813 Datenblatt(HTML) 11 Page - Microchip Technology |
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11 / 57 page ![]() USB 2.0 Hi-Speed 3-Port Hub Controller Optimized for Portable Applications Datasheet 2014 Microchip Technology Inc. DS00001715A-page 11 3.1 Ball Descriptions This section provides a detailed description of each ball. The signals are arranged in functional groups according to their associated interface. The “_N” symbol in the signal name indicates that the active, or asserted, state occurs when the signal is at a low voltage level. For example, RESET_N indicates that the reset signal is active low. When “_N” is not present after the signal name, the signal is asserted when at the high voltage level. The terms assertion and negation are used exclusively. This is done to avoid confusion when working with a mixture of “active low” and “active high” signals. The term assert, or assertion, indicates that a signal is active, independent of whether that level is represented by a high or low voltage. The term negate, or negation, indicates that a signal is inactive. Note: The buffer type for each signal is indicated in the BUFFER TYPE column of Table 3.1. A description of the buffer types is provided in Section 3.3. Table 3.1 Ball Descriptions NUM BALLS NAME SYMBOL BUFFER TYPE DESCRIPTION USB/HSIC INTERFACES 1 Upstream USB D+ (Flex Port 0) DP0 AIO Upstream USB Port 0 D+ data signal. Note: The upstream Port 0 signals can be optionally swapped with the downstream Port 1 signals. 1 Upstream USB D- (Flex Port 0) DM0 AIO Upstream USB Port 0 D- data signal. Note: The upstream Port 0 signals can be optionally swapped with the downstream Port 1 signals. 1 Downstream HSIC Data (Swap Port 1) DATA1 HSIC Downstream HSIC Port 1 DATA signal. Note: The downstream Port 1 signals can be optionally swapped with the upstream Port 0 signals. 1 Downstream HSIC Strobe (Swap Port 1) STRB1 HSIC Downstream HSIC Port 1 STROBE signal. Note: The downstream Port 1 signals can be optionally swapped with the upstream Port 0 signals. 1 Downstream USB D+ (Port 2) DP2 AIO Downstream USB Port 2 D+ data signal. 1 Downstream USB D- (Port 2) DM2 AIO Downstream USB Port 2 D- data signal. 1 Downstream USB D+ (Port 3) DP3 AIO Downstream USB Port 3 D+ data signal. 1 Downstream USB D- (Port 3) DM3 AIO Downstream USB Port 3 D- data signal. |
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