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STWBCTR Datenblatt(PDF) 27 Page - STMicroelectronics |
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STWBCTR Datenblatt(HTML) 27 Page - STMicroelectronics |
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27 / 36 page ![]() DocID027322 Rev 3 27/36 STWBC Electrical characteristics 36 5.3.7 Reset pin characteristics The reset pin parameters are specified under general operating conditions for VDD and TA unless otherwise specified. 5.3.8 I2C interface characteristics Table 13. NRST pin characteristics Symbol Parameter Conditions Min.(1) Typ. Max.(1) Unit VIL(NRST) NRST input low level voltage(1) -0.3 0.3 x VDD V VIH(NRST) NRST input high level voltage(1) 0.7 x VDD VDD + 0.3 VOL(NRST) NRST output low level voltage(1) IOL = 2 mA 0.5 RPU(NRST) NRST pull-up resistor(2) 30 40 60 k tIFP(NRST) NRST input filtered pulse(3) 75 ns tINFP(NRST) NRST not input filtered pulse(3) 500 tOP(NRST) NRST output filtered pulse(3) 15 µs 1. Data based on characterization results, not tested in production. 2. The RPU pull-up equivalent resistor is based on a resistive transistor. 3. Data guaranteed by design, not tested in production. Table 14. I2C interface characteristics Symbol Parameter Standard mode Fast mode Unit Min.(1) Max.(1) Min.(1) Max.(1) tw(SCLL) SCL clock low time 4.7 1.3 µs tw(SCLH) SCL clock high time 4.0 0.6 tsu(SDA) SDA setup time 250 100 ns th(SDA) SDA data hold time 0(2) 0(2) 900(2) tr(SDA) tr(SCL) SDA and SCL rise time (VDD = 3.3 to 5 V)(3) 1000 300 tf(SDA) tf(SCL) SDA and SCL fall time (VDD = 3.3 to 5 V)(3) 300 300 th(STA) START condition hold time 4.0 0.6 µs tsu(STA) Repeated START condition setup time 4.7 0.6 tsu(STO) STOP condition setup time 4.0 0.6 µs tw(STO:STA) STOP to START condition time (bus free) 4.7 1.3 µs Cb Capacitive load for each bus line(4) 50 50 pF 1. Data based on standard I2C protocol requirement, not tested in production. 2. The maximum hold time of the start condition has only to be met if the interface does not stretch the low time 3. I2C multifunction signals require the high sink pad configuration and the interconnection of 1 K pull-up resistances. 4. 50 pF is the maximum load capacitance value to meet the I2C std timing specifications. |
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