LXT351 datasheet(5/46 Pages) INTEL

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Datasheet

T1/E1 Short Haul Transceiver with Crystal-less Jitter Attenuation — LXT351

Tables

LXT351 Clock and Data Pin Assignments by Mode1............................................ 9

LXT351 Processor Interface Pins.......................................................................... 9

LXT351 Signal Descriptions ................................................................................ 10

Diagnostic Mode Summary ................................................................................. 16

Control Register #1 Read/Write, Address (A7-A0) = x010000x .......................... 25

Equalizer Control Input Settings......................................................................... 25

Control Register #2 Read/Write, Address (A7-A0) = x010001x .......................... 25

Control Register #3 Read/Write, Address (A7-A0) = x010010x .......................... 26

Interrupt Clear Register Read/Write, Address (A7-A0) = x010011x.................... 26

Transition Status Register Read Only, Address (A7-A0) = x010100x................. 27

Performance Status Register Read Only, Address (A7-A0) = x010101x ............ 27

Control Register #4 Read/Write, Address (A7-A0) = x010111x .......................... 28

E1 Transmit Return Loss Requirements ............................................................. 29

Transmit Return Loss (2.048 Mbps).................................................................... 30

Transmit Return Loss (1.544 Mbps).................................................................... 30

Transformer Specifications..................................................................................30

Recommended Transformers.............................................................................. 31

Absolute Maximum Ratings................................................................................. 33

Recommended Operating Conditions ................................................................. 33

DC Electrical Characteristics............................................................................... 34

Analog Characteristics ........................................................................................ 34

2.048 Mbps E1 Pulse Mask Specifications ........................................................ 35

1.544 Mbps T1, DSX-1 Pulse Mask Corner Point Specifications........................36

Master and Transmit Clock Timing Characteristics for T1 Operation

(See Figure 14) ................................................................................................... 37

Master and Transmit Clock Timing Characteristics for E1 Operation

(See Figure 14) ................................................................................................... 37

Receive Timing Characteristics for T1 Operation (See Figure 15)...................... 38

Receive Timing Characteristics for E1 Operation (See Figure 15) ..................... 38

20 MHz Intel Bus Parallel I/O Timing Characteristics (See Figure 16)................ 39

16.78 MHz Motorola Bus Parallel I/O Timing Characteristics (See Figure 17) ... 40

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