Connection Diagram

Plastic Chip Carrier

TLF7398 – 8

Top View

Order Number DS8911VDS8913V

See NS Package Number V28A

Pin Descriptions

circuitry except the reference divider chain op amp and mix-

er sections of the die

Op amp

for the premix divider and mixer functions

reference oscillator and divider chain down through the 50

Hz output thus enabling low standby current for time-of-day

clock applications

GND1 GND2 GNDL and GNDM

Provide isolated circuit

ground for the various sections of the device

DATA and CLOCK

The DATA and CLOCK inputs are for

serial data entry from a controller They are CMOS inputs

with TTL logic thresholds The 24-bit data stream is loaded

into the PLL on the positive transition of the CLOCK The

first 14 bits of the data stream select PLL divide code in

binary form MSB first The 15th through 24th bits select the

premix modulus the reference frequency the bit output

status and the testoperate modes as shown in Tables I

through V

ENABLE

The ENABLE input is a CMOS input with a TTL

logic threshold The ENABLE input enables data when at a

logic ‘‘one’’ and latches data on the transition to a logic

‘‘zero’’

BIT Outputs

The open-collector BIT outputs provide either

the status of shift register bits 22 23 and 24 or enable

access to key internal circuit test nodes The mode for the

bit outputs is controlled by shift register bits 20 and 21 In

operation the bit outputs are intended to drive radio func-

tions such as gain mute and AMFM status These outputs

can also be used to program the loop gain by connection of

an external resistor to IPROG Bit 24 output can also be

used as a 300 millisecond timer under control of shift regis-

ter bit 19 During service testing these pins can be used for

the purpose of either monitoring or driving internal logic

points as indicated in the TEST MODES description under

Table V

VCOb and VCOe

The Voltage Controlled Oscillator inputs

drive the 14-bit programmable counter and the premix divid-

er These inputs are the base and emitter leads of a transis-

tor which require connection of a coil varactor and several

capacitors to function as a Colpitts oscillator The VCO is

designed to operate up to 225 MHz The VCO’s minimum

operating frequency may be limited by the choice of refer-

ence frequency and the 961 minimum modulus constraint of

the 3132 dual modulus counter

entially into the mixer

IMXR

The bias current for the mixer is programmed by con-

nection of an external resistor to this pin The total mixer

output current equals 4 times the current entering this pin

MIXER and MIXER

The MIXER outputs are the collectors

of the double balanced pair mixer transistors They are in-

OSCb and OSCc

The Reference Oscillator inputs are part

of an on-chip Pierce oscillator designed to work in conjunc-

tion with 2 capacitors and a crystal resonator The DS8911

requires a 12 MHz crystal to derive the reference frequen-

cies shown in Table II The DS8913 requires 10 MHz crystal

The 12 MHz OSC signal is also used externally as the 2nd

AM LO to obtain a 450 kHz 2nd IF frequency in the AM

mode

2 MHz

The 2 MHz output is provided to drive a controller’s

clock input

50 Hz

The 50 Hz output is provided as a time reference for

radios with time-of-day clocks

IPROG

The IPROG pin enables the charge pump to be

programmed from 025 mA to 10 mA by connection of an

external resistor to ground

CPO

The Charge Pump Output circuit sources current if the

VCO frequency is high and sinks current if the VCO frequen-

cy is low The CPO is wired directly to the negative input of

the loop filter op amp

OP AMP

The OP AMP output is provided for loop filtering

The op amp has high impedance PMOS gate inputs and is

wired as a transconductance amplifierfilter The op amp’s

positive input is internally referenced while its negative input

is common with the CPO output

2