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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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PCM3500E/2K Datenblatt(PDF) 2 Page - Texas Instruments |
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PCM3500E/2K Datenblatt(HTML) 2 Page - Texas Instruments |
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2 / 26 page  ® 2 PCM3500 SPECIFICATIONS All specifications at +25 °C, V DD = VCC = 3.3V, fS = 8kHz, and nominal system clock (XTI) = 512fS, unless otherwise noted. Measurement band is 100Hz to 0.425fS. NOTES: (1) Pins 6, 7, 8, 9, 10, 15, 17, 18, 19, 20 (M/S, TSC, BCK, FS, DIN, SCKIO, XTI, HPFD, LOOP, PDWN). (2) Pins 8, 9, 10, 15, 17 (BCK, FS, DIN, SCKIO (Schmitt-Trigger input) XTI. (3) Pins 6, 7, 18, 19, 20 (M/S, TSC, HPFD, LOOP, PDWN; Schmitt-Trigger input with internal pull-down). (4) Pins 8, 9, 11, 12, 15, 16 (BCK, FS, DOUT, FSO, SCKIO, XTO). PCM3500E PARAMETER CONDITIONS MIN TYP MAX UNITS RESOLUTION 16 Bits DATA FORMAT Serial Data Interface Format DSP Format Serial Data Bit Length 16 Bits Serial Data Format Sampling Frequency, fS ADC and DAC 7.2 8 26 kHz System Clock Frequency, 512fS 3.686 4.096 13.312 MHz DIGITAL INPUT/OUTPUT Logic Family CMOS Input Logic Level: VIH(1) 0.7 • VDD VDC VIL(1) 0.3 • VDD VDC Input Logic Current: IIN(2) ±1 µA IIN(3) 100 µA Output Logic Level: VOH(4) IOUT = –1mA VDD – 0.3 VDC VOL(4) IOUT = +1mA 0.3 VDC ADC CHARACTERISTICS DC ACCURACY Input Voltage 0.6 VCC Vp-p Gain Error ±2 ±5 % of FSR Offset Error High-Pass Filter Disabled ±2 % of FSR Input Resistance 50 k Ω AC ACCURACY THD+N fIN = 1kHz, VIN = –0.5dB –85 –80 dB Dynamic Range Without A-Weighting 82 88 dB Signal-to-Noise Ratio Without A-Weighting 82 88 dB Crosstalk DAC Channel Idle, 0dB Input 80 85 dB Passband Ripple (internal HPF enabled) 0.0002fS to 0.425fS ±0.05 dB Passband Ripple (internal HPF disabled) 0fS to 0.425fS ±0.05 dB Roll-Off at 0.00002fS High-Pass Filter Enabled –3 dB Roll-Off at 0.56fS High-Pass Filter Enabled –30 dB Stopband Rejection 0.58fS to fS –65 dB Group Delay 18/fS 4m sec DAC CHARACTERISTICS DC ACCURACY Output Voltage 0.6 VCC Vp-p Gain Error ±1 ±5 % of FSR Offset Error High Pass Filter Disabled ±1 % of FSR Load Resistance 10 k Ω AC ACCURACY THD+N fIN = 1kHz, VOUT = 0dB –90 –82 dB Dynamic Range Without A-Weighted 84 92 dB Signal-to-Noise Ratio Without A-Weighted 84 92 dB Crosstalk ADC Channel Idle, 0dB Input 84 92 dB Passband Ripple 0fS to 0.425fS ±0.4 dB Group Delay 12/fS 4m sec POWER SUPPLY REQUIREMENTS Voltage Range VCC, VDD 2.7 3.3 3.6 VDC Supply Current, ICC + IDD VCC = 3.3V 9 12 mA Total Supply Current in Power-Down Mode VCC = VDD = 3.3V, XTI Stopped 60 µA Total Power Dissipation VCC = VDD = 3.3V 30 40 mW TEMPERATURE RANGE Operating –25 +85 °C Storage –55 +125 °C Thermal Resistance, Θ JA 100 °C/W MSB-First, Binary Two’s Complement |
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