LM3524DN datasheet(9/22 Pages) NSC

9 / 22 page

Functional Description (Continued)

The output of the amplifier, or input to the pulse width modu-

lator, can be overridden easily as its output impedance is

very high (Z

O . 5M

Ω). For this reason a DC voltage can be

applied to pin 9 which will override the error amplifier and

force a particular duty cycle to the outputs. An example of

this could be a non-regulating motor speed control where a

variable voltage was applied to pin 9 to control motor speed.

A graph of the output duty cycle vs the voltage on pin 9 is

shown in Figure 5.

The duty cycle is calculated as the percentage ratio of each

output’s ON-time to the oscillator period. Paralleling the out-

puts doubles the observed duty cycle.

The amplifier’s inputs have a common-mode input range of

1.5V–5.5V. The on board regulator is useful for biasing the

inputs to within this range.

CURRENT LIMITING

The function of the current limit amplifier is to override the

error amplifier’s output and take control of the pulse width.

The output duty cycle drops to about 25% when a current

limit sense voltage of 200 mV is applied between the +C

and −C

Lsense terminals. Increasing the sense voltage ap-

proximately 5% results in a 0% output duty cycle. Care

should be taken to ensure the −0.7V to +1.0V input common-

mode range is not exceeded.

In most applications, the current limit sense voltage is pro-

duced by a current through a sense resistor. The accuracy of

this measurement is limited by the accuracy of the sense

resistor, and by a small offset current, typically 100 µA,

flowing from +CL to −CL.

OUTPUT STAGES

The outputs of the LM3524D are NPN transistors, capable of

a maximum current of 200 mA. These transistors are driven

180˚ out of phase and have non-committed open collectors

and emitters as shown in Figure 6.

00865008

FIGURE 5.

00865009

FIGURE 6.

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