LM3524DN datasheet(14/22 Pages) NSC

14 / 22 page

Typical Applications (Continued)

where: L1 is in Henrys

f is switching frequency in Hz

Also, see LM1578 data sheet for graphical methods of in-

ductor selection.

CALCULATING OUTPUT FILTER CAPACITOR C

Figure 13 shows L1’s current with respect to Q1’s t

ON and

OFF times (VA is at the collector of Q1). This curent must

flow to the load and C

o.Co’s current will then be the differ-

ence between I

L, and Io.

o =IL −Io

From Figure 13 it can be seen that current will be flowing into

o for the second half of tON through the first half of tOFF,or

a time, t

ON/2+tOFF/2. The current flowing for this time is

∆I

L/4. The resulting

∆V

c or

∆V

o is described by:

For best regulation, the inductor’s current cannot be allowed

to fall to zero. Some minimum load current I

o, and thus

inductor current, is required as shown below:

A complete step-down switching regulator schematic, using

the LM3524D, is illustrated in Figure 15. Transistors Q1 and

Q2 have been added to boost the output to 1A. The 5V

regulator of the LM3524D has been divided in half to bias the

error amplifier’s non-inverting input to within its common-

mode range. Since each output transistor is on for half the

period, actually 45%, they have been paralleled to allow

longer possible duty cycle, up to 90%. This makes a lower

possible input voltage. The output voltage is set by:

where V

NI is the voltage at the error amplifier’s non-inverting

input.

Resistor R3 sets the current limit to:

Figures 16, 17 and show a PC board layout and stuffing

diagram for the 5V, 1A regulator of Figure 15. The regulator’s

performance is listed in Table 1.

00865019

FIGURE 14. Inductor Current Slope in Step-Down

Regulator

LM3524DN Datenblatt(PDF) 14 Page - National Semiconductor (TI)

LM3524DN Datenblatt(HTML) 14 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

Datenblatt Download

Link URL