STMPE16M31 datasheet(24/85 Pages) STMICROELECTRONICS

24 / 85 page

System controller

STMPE16M31, STMPE24M31

24/85

Doc ID 16174 Rev 4

SYSCON-2

Sensor and PWM clock divider

Address:

0x04

Type:

R/W

Reset:

0xFE

Description:

Sensor and PWM clock divider. The SYSCON-2 register controls the sensor and

PWM clock speed, and the clock gating of various functional modules.

This bit will always read '0'. as the I2C transaction to read this bit will wake up the

device from hibernate mode.

543

210

SCLK_DIV

PCLK_DIV

GPIO_CLK

PWM_CLK

CS_CLK

[7:5] SCLK_DIV: Sensor clock divider.

000, 001, 010: RESERVED

011: 64

100: 128

101: 256

110: 512

111: 1024

Sensor clock is 2 MHz / ( PRBS_Factor * SCLK_DIV[2:0] )

PRBS factor = 4.5

[4:3] PCLK_DIV: PWM clock divider

00 for 16 kHz

01 for 32 kHz

10 for 64 kHz

11 for 128 kHz

[2] GPIO_CLK: GPIO clock disable

Write “1” to diWrite “1“ to disable the clock to GPIO module.

When clock to GPIO module is disabled, access to GPIO module register will not work correctly.

[1] PMW_CLK: PWM clock disable

Write “1“ to disable the clock to PWM module.

When clock to PWM module is disabled, access to PWM module register will not work correctly.

[0] CS_CLK: Capacitive sensor clock disable

Write “1“ to disable the clock to capactive sensor module

When clock to touch module is disabled, access to touch module registers will not work

correclty.

Obsolete

Product(s)

- Obsolete

Product(s)

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