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AT91EB55 Datenblatt(PDF) 13 Page - ATMEL Corporation

Teilenummer AT91EB55
Bauteilbeschribung  AT91EB55 Evaluation Board
PDF  37 Pages
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Hersteller  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT91EB55 Datenblatt(HTML) 13 Page - ATMEL Corporation

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Circuit Description
AT91EB55 Evaluation Board User Guide
4-3
Power can be applied via the 2.1 mm connector to the regulator in either polarity
because of the diode rectifying circuit. Another regulator allows the user to power the
AT91M55800A core with 3.3V or 2V by the mean of the JP8 jumper.
A 3V battery is provided on-board (Figure 8 in "Appendix B – Schematics") to power the
RTC and APMC (V
DDBU). It has been provided to ensure the power supply for approxi-
mately 1 year.
4.6
Push Buttons,
LEDs, Reset and
Serial Interface
The IRQ0, TIOA0, PB17 and PB19 switches are debounced and buffered.
A supervisory circuit has been included in the design to detect and, consequently, reset
the board when the 3.3V supply voltage drops below a typical 3.0V threshold. Note that
the threshold can change, depending on the board production series. The supervisory
circuit also provides a debounced reset signal. This device can also generate the reset
signal in case of watchdog timeout as the pin NWDOVF of the AT91M55800A is con-
nected on its input MR.
The assertion of this reset signal will light the red RESET LED D10 and if the CLEAR
RESET push button is pressed the LED D10 will unlight.
Another supervisory circuit separately initializes the microcontroller embedded
JTAG/ICE interface when the 3.3V supply voltage drops below a typical 3.0V threshold.
Note that this voltage can change depending on the board production series. The sepa-
rated reset lines allow the user to reset the board without resetting the JTAG/ICE
interface while debugging. bill
An RC device has been fitted on-board to ensure a correct power-on reset for the bat-
tery power supply modules (VDDBU) first power up or when VDDBU has been
disconnected. This RC network has been calculated to generate a valid 300 ms mini-
mum pulse width NRSTBU signal.
The schematic Figure 5 in "Appendix B - Schematics" also shows eight general-purpose
LEDs connected to Port B PIO pins PB8 to PB15.
Two 9-way D-type connectors P3/4 are provided for serial port connection.
Serial Port A (P3) is used primarily for host PC communication and is a DB9 female con-
nector. TXD and RXD are swapped so that a straight through cable can be used. CTS
and RTS are connected together as are DCD, DSR and DTR.
Serial Port B (P4) is a DB9 male connector with TXD and RXD obeying the standard
RS-232 pin-out. Apart from TXD, RXD and Ground, the other pins are not connected.
A MAX3223 device U10 and associated bulk storage capacitors provide RS-232 level
conversion.
4.7
Layout Drawing
The layout diagram schematic shows an approximate floorplan for the board. This has
been designed to give the lowest board area, while still providing access to all test
points, jumpers and switches on the board. See Figure 1 in “Appendix B – Schematics.”
The board is provided with four mounting holes, one at each corner, into which feet are
attached. The board has two signal layers and two power planes.



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