OX16CF950 datasheet(7/60 Pages) ETC

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Page 7

OXCF950 DATA SHEET V1.1

OXFORD SEMICONDUCTOR LTD.

SIN

IrDA_In

UART serial data input.

UART IrDA data input when IrDA mode is enabled (see

above).

DCD#

Active-low modem data-carrier-detect input.

DTR#

485_En

Tx_Clk_Out

Active-low modem data-terminal-ready output. If automated

DTR# flow control is enabled, the DTR# pin is asserted and

de-asserted if the receiver FIFO reaches or falls below the

programmed thresholds, respectively.

In RS485 half-duplex mode, the DTR# pin may be

programmed to reflect the state of the transmitter empty bit to

automatically control the direction of the RS485 transceiver

buffer (see register ACR[4:3]).

Transmitter 1x clock (baud rate generator output). For

isochronous applications, the 1x (or Nx) transmitter clock may

be asserted on the DTR# pin (see register CKS[5:4]).

RTS#

Active–low modem request-to-send output. If automated

RTS# flow control is enabled, the RTS# pin is de-asserted

and reasserted whenever the receiver FIFO reaches or falls

below the programmed thresholds, respectively.

CTS#

Active-low modem clear-to-send input. If automated CTS#

flow control is enabled, upon de-assertion of the CTS# pin,

the transmitter will complete the current character and enter

the idle mode until the CTS# pin is reasserted. Note: flow

control characters are transmitted regardless of the state of

the CTS# pin.

DSR#

Rx_Clk_In

Active-low modem data-set-ready input. If automated DSR#

flow control is enabled, upon de-assertion of the DSR# pin,

the transmitter will complete the current character and enter

the idle mode until the DSR# pin is reasserted. Note: flow

control characters are transmitted regardless of the state of

the DSR# pin

External receiver clock for isochronous applications. The

Rx_Clk_In is selected when register CKS[1:0] = ’01’

RI#

Tx_Clk_In

Active-low modem Ring-indicator input

External transmitter clock. This clock can be used by the

transmitter (and indirectly by the receiver) when register

CKS[6] = ‘1’.

XTLO

Crystal oscillator output

XTLI

Crystal oscillator input or external clock pin. Frequency

1.8MHz -> 60MHz

LBCS#

A[5]

Local Bus Mode : Active low local bus Chip select

Normal Mode : Address bit 5

LBRD#2

A[6]

Local Bus Mode : Active-low local bus read enable

Normal Mode : Address bit 6

LBWR

A[7]

Local Bus Mode : Active-low local bus write enable

Normal Mode : Address bit 7

LBRST2

A[4]

Local Bus Mode : Active high local bus Reset

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