1 / 14 page
100-MHz Differential Buffer for PCI Express and SATA
CY28400
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
, CA 95134
•
408-943-2600
Document #: 38-07591 Rev. **
Revised November 24, 2003
Features
• CK409 or CK410 companion buffer
• Four differential 0.7v clock pairs
• Individual OE controls
• Low CTC jitter (< 50 ps)
• Programmable bandwidth
• SRC_STOP# power management control
• SMBus Block/Byte/Word Read and Write support
• 3.3V operation
• PLL Bypass-configurable
• Divide by 2 programmable outputs
• 28-pin SSOP package
Functional Description
The CY28400 is a differential buffer and serves as a
companion device to the CK409 or CK410 clock generator.
The device is capable of distributing the Serial Reference
Clock (SRC) in PCI Express and SATA implementations.
Block Diagram
Pin Configuration
PLL/BYPASS#
DIFT2
DIFC2
DIFT1
DIFC1
DIFT5
DIFC5
DIFT6
DIFC6
Output
Buffer
Output
Control
PLL
DIV
SMBus
Controller
SRC_STOP#
PWRDWN#
SCLK
SDATA
SRCT_IN
SRCC_IN
HIGH_BW#
OE_(1,6)
28 SSOP
VDD
SRCT_IN
VSS
VDD
DIFT1
DIFC1
OE_1
DIFT2
DIFC2
VDD
PLL/BYPASS#
SCLK
SDATA
VDD_A
VSS_A
SRC_STOP#
PWRDWN#
HIGH_BW#
DIFC5
VDD
DIFT5
DIFC6
0E_6
DIFT6
VSS
VDD
IREF
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SRCC_IN
German ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
