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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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STC89LE53RC Datenblatt(PDF) 80 Page - STCmicro Technology Co,.Ltd |
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STC89LE53RC Datenblatt(HTML) 80 Page - STCmicro Technology Co,.Ltd |
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80 / 165 page  The External Interrupts INT0, INT1 , INT2 and INT3 can each be either level-activated or transition-activated, depending on bits IT0 and IT1 in Register TCON, IT2 and IT3 in SFR XICON. The flags that actually generate these interrupts are bits IE0 and IE1 in TCON, IE2 and IE3 in XICON. When an external interrupt is generated, the flag that generated it is cleared by the hardware when the service routine is vectored to if and only if the interrupt was transition –activated, otherwise the external requesting source is what controls the request flag, rather than the on-chip hardware. The Timer 0 and Timer1 Interrupts are generated by TF0 and TF1, which are set by a rollover in their respective Timer/Counter registers in most cases. When a timer interrupt is generated, the flag that generated it is cleared by the on-chip hardware when the service routine is vectored to. The Serial Port Interrupt is generated by the logical OR of RI and TI. Neither of these flags is cleared by hardware when the service routine is vectored to. In fact, the service routine will normally have to determine whether it was RI and TI that generated the interrupt, and the bit will have to be cleared by software. The Timer 2 Interrupt is generates by the logical OR of TF2 and EXF2. Just the same as serial port, neither of these flags is cleared by hardware when the service routine is vectored to. All of the bits that generate interrupts can be set or cleared by software, with the same result as though it had been set or cleared by hardware. In other words, interrupts can be generated or pending interrupts can be canceled in software. 6.2 Interrupt Register Symbol Description Address Bit Address and Symbol MSB LSB Value after Power-on or Reset IE Interrupt Enable A8H EA - ET2 ES ET1 EX1 ET0 EX0 0000 0000B IP Interrupt Priority Low B8H - - PT2 PS PT1 PX1 PT0 PX0 xx00 0000B IPH Interrupt Priority High B7H PX3H PX2H PT2H PSH PT1H PX1H PT0H PX0H 0000,0000B TCON Timer/Counter 0 and 1 Control 88H TF1 TR1 TF0 TR0 IE1 IT1 IE0 IT0 0000 0000B SCON Serial Control 98H SM0/FE SM1 SM2 REN TB8 RB8 TI RI 0000 0000B T2CON Timer/Counter 2 Control C8H TF2 EXF2 RCLK TCLK EXEN2 TR2 C/T2 CP/RL2 0000 0000B XICON Auxiliary Interupt Control C0H PX3 EX3 IE3 IT3 PX2 EX2 IE2 IT1 0000 0000B 80 |
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