ADHV4702-1BCPZ-R7 datasheet(18/21 Pages) AD

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ADHV4702-1

Data Sheet

Rev. A | Page 18 of 21

Device to device variation in the TMP pin voltage may result in

different shutdown threshold temperatures or shutdown

response times among various devices while implementing the

200 kΩ RTMP. The shutdown threshold can be adjusted with a

smaller RTMP resistance, yielding a lower threshold temperature.

The RTMP together with the internal resistors of TMP form a

voltage divider that influences the TMP pin reading and TMP

voltage drift. The TMP data in Table 1 and the Temperature

Monitor (TMP) section is only valid when RTMP is uninstalled.

TMP

120kΩ

400kΩ

DGND

RTMP

~5.3V

140kΩ

ITMP

HIGH IMPEDANCE

NODE

~5.3V

Figure 54. TMP and SD Pin Configuration for Short-Circuit Protection and

Thermal Shutdown

OUTPUT CURRENT DRIVE AND SHORT-CIRCUIT

PROTECTION

The ADHV4702-1 uses an output stage constructed with

cascaded, double diffused, metal-oxide-semiconductor

(DMOS) high voltage transistors that provide wide output

swing. The ADHV4702-1 can typically drive a 20 mA load

current continuously. Though with proper thermal management,

the ADHV4702-1 can deliver up to 50 mA. Short-circuit

protection is provided by means of the thermal shutdown

feature. To enable short-circuit protection, connect the SD and

TMP pins, and tie both to DGND with a 200 kΩ RTMP.

EXTERNAL COMPENSATION AND CAPACITIVE

LOAD (CLOAD) DRIVING

When driving a CLOAD, the amplifier output resistance and the

load capacitance form a pole in the transfer function of the

amplifier. This additional pole reduces phase margin at higher

frequencies and, if left uncompensated, can result in excessive

peaking and instability. Placing a series resistor (RS) between the

amplifier output and CLOAD (as shown in Figure 55) allows the

ADHV4702-1 to drive capacitive loads beyond 1 μF. Figure 56

shows the series resistor value vs. load capacitance for a

maximum of 2 dB peaking in the circuit of Figure 55.

In addition to the series resistor, the ADHV4702-1 includes an

optional external compensation feature for driving capacitive

loads. A capacitor (CCOMP) can be installed between COMP and

DGND to reduce output stage peaking associated with

capacitive loads. CCOMP must be rated for the full supply

differential. Figure 58 shows the effect of CCOMP on various

capacitive loads.

The values shown in Figure 56, Figure 57, and Figure 58 are for

unity gain configuration with a purely CLOAD. This is a worst

case scenario because the amplifier is more stable at higher

gains and with some resistive load in parallel with the load

capacitance. Although the RS or CCOMP significantly increases

the stability while driving CLOAD, they also reduce the headroom

and bandwidth while driving a resistive load. For resistive loads,

leave the COMP pin floating.

CLOAD

VIN

5kΩ

100kΩ

Figure 55. Circuit for CLOAD Drive

100

120

140

160

10p

100p

10n

100n

1µ

CLOAD (F)

Figure 56. RS vs. CLOAD for Maximum 2 dB Peaking for Circuit from Figure 55,

TA = 25°C, AV = 1, VS = ±110 V, VOUT = 100 mV p-p, RF = 0 Ω, RADJ = 0 Ω

–18

–15

–12

–9

–6

–3

10k

100k

10M

100M

FREQUENCY (Hz)

RS = 50Ω

RS = 2.21Ω,

CLOAD = 1µF

RS = 57.6Ω,

CLOAD = 1nF

RS = 130Ω,

CLOAD = 200pF

Figure 57. Small Signal Response for Various CLOAD and RS Values, TA = 25°C,

AV = 1, VS = ±110 V, VOUT = 100 mV p-p, RF = 0 Ω, RADJ = 0 Ω

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