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STM8S Datenblatt(PDF) 84 Page - STMicroelectronics |
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STM8S Datenblatt(HTML) 84 Page - STMicroelectronics |
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84 / 467 page ![]() Clock control (CLK) RM0016 84/467 DocID14587 Rev 14 As soon as the target clock source is ready (stabilized), the content of the CLK_SWR register is copied to the Clock master status register (CLK_CMSR). The SWBSY bit is cleared and the new clock source replaces the old one. The SWIF flag in the CLK_SWCR is set and an interrupt is generated if the SWIEN bit is set. Manual switching The manual switching is not as immediate as the automatic switching but it offers to the user a precise control of the switch event time. To enable manual switching, follow the sequence below (refer to the flowchart in Figure 23): 1. Write the 8-bit value used to select the target clock source in the Clock master switch register (CLK_SWR). Then the SWBSY bit is set by hardware, and the target source oscillator starts. The old clock source continues to drive the CPU and peripherals. 2. The software has to wait until the target clock source is ready (stabilized). This is indicated by the SWIF flag in the CLK_SWCR register and by an interrupt if the SWIEN bit is set. 3. The final software action is to set, at the chosen time, the SWEN bit in the CLK_SWCR register to execute the switch. In both manual and automatic switching modes, the old master clock source will not be powered off automatically in case it is required by other blocks (the LSI RC may be used to drive the independent watchdog for example). The clock source can be powered off using the bits in the Internal clock register (CLK_ICKR) and External clock register (CLK_ECKR). If the clock switch does not work for any reason, software can reset the current switch operation by clearing the SWBSY flag. This will restore the CLK_SWR register to its previous content (old master clock). |
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