PXE1610C

PDS-PXE1-PXM1-C-001A

4

PXE1610 General Description

The PXE1610 digital dual rail 6+1 phase controller provides power for Intel® VR13 server applications. Core voltage

is provided by a multi-phase buck converter with up to six synchronous-rectified channels in parallel while a single

phase second rail provides voltage for the I/O.

Package Pin Designations

Table 6: PXE1610 Pin Descriptions

Pin #

Name

I/O

Type

Description

1

BPWM1

O

3.3V CMOS

Loop_B phase #1 PWM output. Refer to APWM1 description.

2

APWM6

O

3.3V CMOS

Loop_A phase #6 PWM output. Refer to APWM1 description.

3

APWM5

O

3.3V CMOS

Loop_A phase #5 PWM output. Refer to APWM1 description.

4

APWM4

O

3.3V CMOS

Loop_A phase #4 PWM output. Refer to APWM1 description.

5

APWM3

O

3.3V CMOS

Loop_A phase #3 PWM output. Refer to APWM1 description.

6

APWM2

O

3.3V CMOS

Loop_A phase #2 PWM output. Refer to APWM1 description.

7

APWM1

O

3.3V CMOS

Loop_A phase #1 Pulse Width Modulation (PWM) output. This signal is used

to drive the PWM input of the power stage/FET driver IC. Unused PWM pins

should be left unconnected (floating).

8

SDA

I/O

Open Drain

SMBus/I2C bi-directional serial data signal

9

SCL

I/O

Open Drain

SMBus/I2C bi-directional serial clock signal

10

RESET#

I

3.3V CMOS

RESET# feature allows controller to be put into lowest power dissipation

mode. This pin may be left floating if unused but it is recommended that a

1kΩ pull up to 3.3V be used if this signal is connected to a trace on the board.

PXE1610A

24

23

22

21

20

19

18

17

16

15

14

13

37

38

39

40

41

42

43

44

45

46

47

48

VD12

VDD

IINSEN

VINSEN

XADDR1

ATSEN

BTSEN

XADDR2

MP4

MP3

BISEN1

BIREF1

VRHOT#

PINALRT#

MP0

MP1

VCLK

VDIO

VALRT#

MP2

AVSEN

AVREF

AIREF1

AISEN1

PXE1610

24

23

22

21

20

19

18

17

16

15

14

13

37

38

39

40

41

42

43

44

45

46

47

48