L99LD02 datasheet(39/66 Pages) STMICROELECTRONICS

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DS12448 Rev 3

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L99LD02

Serial peripheral interface (ST SPI standard)

GOSTBY

Standby Mode Bit:



[0]: Device waked up

[1]: Standby (if EN = 0)

GOSTBY can be set to 1 only if UNLOCK = 1; trying to set

this bit to 1 when UNLOCK = 0 will have no effects and it

will maintain its previous value.

GOSTBY can be reset to 0 also when UNLOCK = 0.

To set Standby mode it is necessary to send two

consecutive SPI frames, as follows:

1st SPI write operation to set UNLOCK bit to 1 (CR#1,

bit1)

2nd SPI write operation to set GOSTBY bit to 1 and EN bit

to 0

Active Mode Enable Bit:

[0]: Device stays in Limp Mode (if GOSTBY = 0). This

status is assumed immediately after a wake up (CSN low

for a time > tWAKE_UP)

[1]: Device Enabled for Active Mode operation (if

GOSTBY = 0).

EN can be set to 1 only if UNLOCK = 1; trying to set this

bit to 1 when UNLOCK = 0 will have no effects and it will

maintain its previous value.

EN can be reset to 0 also when UNLOCK = 0.

To set Active Mode it is necessary to send two

consecutive SPI frames as follows:

1st SPI write operation to set UNLOCK bit to 1 (CR#1,

bit1)

2nd SPI write operation to set GOSTBY bit to 0 and EN bit

to 1

Set by OTP

DEF_MS

Master/Slave bit

[0]: Device is Master



(pin SYNC_IO is an output, providing a 180° phase shifted

replica of internal Boost clock)

[1]: Device is Slave



(pin SYNC_IO is an input and it is used as a clock for the

Boost)

Parity Bit

ODD Parity Bit Check

Table 23. CR#2: Control Register 2 (continued)

Bit

Default

Name

Description

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