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NGTP25P140FST4G Datenblatt(PDF) 8 Page - ON Semiconductor |
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NGTP25P140FST4G Datenblatt(HTML) 8 Page - ON Semiconductor |
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8 / 10 page ![]() AND9068/D http://onsemi.com 7 begins to rise from VCE(sat) as the charge due to current flow is removed. The voltage across the device reaches the supply voltage, and minority carriers that remain in the device after turn−off cause a tail current that continues to flow. This is illustrated in Figure 10. The switching characteristics are given in the electrical parametric table for TJ = 25 and 150°C. These are shown in Table 5. Table 5. INDUCTIVE SWITCHING ELECTRICAL CHARACTERISTICS OF THE IGBT Parameter Test Conditions Symbol Min Typ Max Unit SWITCHING CHARACTERISTIC , INDUCTIVE LOAD Turn−on delay time TJ = 25°C VCC = 400 V, IC = 15 A Rg = 22 W VGE = 0 V / 15 V td(on) 78 ns Rise time tr 30 Turn−off delay time td(off) 130 Fall time tf 120 Turn−on switching loss Eon 0.900 mJ Turn−off switching loss Eoff 0.300 Total switching loss Ets 1.200 Turn−on delay time TJ = 150°C VCC = 400 V, IC = 15 A Rg = 22 W VGE = 0 V / 15 V td(on) 76 ns Rise time tr 33 Turn−off delay time td(off) 133 Fall time tf 223 Turn−on switching loss Eon 1.10 mJ Turn−off switching loss Eoff 0.510 Total switching loss Ets 1.610 Figure 9. Turn−on Switching Illustration Showing the Definitions of the Turn−on Switching Characteristics Turn−on Delay Time, td(on) td(on) is the time delay between the rising edge of the gate pulse and the rising edge of the IGBT collector current. The measurement considers the point at which both the gate voltage and collector current reach 10% of their final specified value. Rise Time, tr The interval between the time the collector reaches 10% of its specified current value and the time it reaches 90% of its final value is defined as the rise time. Turn−on Switching Loss, Eon The turn−on switching losses are calculated by integrating the power dissipation (IC x VCE) over the time interval starting when the collector current reaches 10% of its final value and ending when the collector−emitter voltage reaches 5% of its peak value. Turn−off Delay Time, td(off) td(off) is the time delay between the falling edge of the gate pulse and the falling edge of the collector current. The measurement is the time between the point at which the gate voltage falls to 90% of its maximum value and the collector current reaches 10% of its final specified value. Fall Time, tf The fall time is defined as the time required for the collector current to drop from 90% to 10% of its initial value. Turn−off Switching Loss, Eoff The turn−off switching energy losses are calculated to include the overlap of the rising collector−emitter voltage |
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