MSM7732-01TB datasheet(17/29 Pages) OKI

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FEDL7732-01-10

OKI Semiconductor

MSM7732-01

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FUNCTIONAL DESCRIPTION

Control Registers

CR0 (Basic operating mode 1)

Note: Initial Value: Reset state by PDN

CR0

A/µ SEL

PON

AOUT

PDN ALL PDN TX PDN RX

SLP

SLP SEL

LNR

Initial Value

B7………… PCM companding law select; 0/µ-law, 1/A-law

B6………… Power on control for output amps (AOUT+, AOUT–); 0/Power down, 1/Power on

B5………… Power down (entire system); 0/Power on, 1/Power down

When using this data for power down control, set pin

PDN at “1” level.

The control registers are not reset by this signal.

B4………… Power down (transmit and amplifier A); 0/Power on, 1/Power down

B3………… Power down (receive only); 0/Power on, 1/Power down

B2………… Slope filter enable; 0/Slope filter disable, 1/ Slope filter enable

B1………… The type of slope filter select; 0/CASE1, 1/CASE2, refer to Figure 6.

B0………… PCM interface linear code select;

0/Companding law selected by CR0-B7

1/14-bit linear code (2’s complement) in spite of CR0-B7

Figure 6 Frequency Response of Slope Filter

[Hz]

–14

–12

–10

–8

–6

–4

–2

500

1000

1500

2000

2500

3000

3500

4000

Frequency

CASE1

CASE2

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