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PCA8530DUG/DAZ Datenblatt(PDF) 24 Page - NXP Semiconductors

Teilenummer PCA8530DUG/DAZ
Bauteilbeschribung  Automotive 102 x 4 Chip-On-Glass LCD segment driver
PDF  103 Pages
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Hersteller  NXP [NXP Semiconductors]
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PCA8530DUG/DAZ Datenblatt(HTML) 24 Page - NXP Semiconductors

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PCA8530
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 2 — 25 September 2014
24 of 103
NXP Semiconductors
PCA8530
Automotive 102 x 4 Chip-On-Glass LCD segment driver
8.7 Display RAM commands
8.7.1 Command: Write-display-data
The Write-display-data command writes data byte-wise to the RAM. After Power-On
Reset (POR), the RAM content is random and should be brought to a defined status by
clearing it (setting it logic 0).
More information about the display RAM can be found in Section 8.14 on page 51.
8.7.2 Bank select commands
For multiplex drive modes 1:2, and static drive mode, it is possible to write data to one
area of the RAM while displaying from another. These areas are named as RAM banks.
Input and output banks can be set independently from one another with the
Input-bank-select and the Output-bank-select command. More information about RAM
bank switching can be found in Section 8.14.3 on page 53.
8.7.2.1
Command: Input-bank-select
Table 25.
Write-display-data - write display data command bit description
For this command, the register selection bits have to be set RS[1:0] = 01.
Bit
Symbol
Value
Description
-R/W
0
fixed value
-
RS[1:0]
01
fixed value
7 to 0
DB[7:0]
00000000 to
11111111
writing data byte-wise to RAM
Table 26.
Input-bank-select - input bank select command bit description
This command is not applicable for multiplex drive mode 1:4.
Bit
Symbol
Value
Description
-R/W
0
fixed value
-
RS[1:0]
00
fixed value
7 to 2
-
000010
fixed value
1 to 0
IB[1:0]
selects RAM bank to write to
static drive mode
1:2 drive mode
00
bank 0: RAM-row 0
bank 0: RAM-rows 0
and 1
01
bank 1: RAM-row 1
10
bank 2: RAM-row 2
bank 2: RAM-rows 2
and 3
11
bank 3: RAM-row 3



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