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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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CS47L35 Datenblatt(PDF) 76 Page - Cirrus Logic |
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CS47L35 Datenblatt(HTML) 76 Page - Cirrus Logic |
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76 / 300 page  76 DS1085F3 CS47L35 4.3 Digital Core The register bits associated with the ISRCs are described in Table 4-22. Table 4-22. Digital-Core ISRC Control Register Address Bit Label Default Description R3824 (0x0EF0) ISRC1_CTRL_1 14:11 ISRC1_FSH[3:0] 0000 ISRC1 High Sample Rate (Sets the higher of the ISRC1 sample rates) 0000 = SAMPLE_RATE_1 0001 = SAMPLE_RATE_2 0010 = SAMPLE_RATE_3 All other codes are reserved. The selected sample rate is valid in the range 8 kHz to 192 kHz. All ISRC1_DECn_SRC fields must be cleared before changing ISRC1_FSH. R3825 (0x0EF1) ISRC1_CTRL_2 14:11 ISRC1_FSL[3:0] 0000 ISRC1 Low Sample Rate (Sets the lower of the ISRC1 sample rates) 0000 = SAMPLE_RATE_1 0001 = SAMPLE_RATE_2 0010 = SAMPLE_RATE_3 All other codes are reserved. The selected sample rate is valid in the range 8 kHz to 192 kHz. All ISRC1_INTn_SRC fields must be cleared before changing ISRC1_FSL. R3826 (0x0EF2) ISRC1_CTRL_3 15 ISRC1_INT1_ENA 0 ISRC1 INT1 Enable (Interpolation Channel 1 path from ISRC1_FSL rate to ISRC1_FSH rate) 0 = Disabled 1 = Enabled 14 ISRC1_INT2_ENA 0 ISRC1 INT2 Enable (Interpolation Channel 2 path from ISRC1_FSL rate to ISRC1_FSH rate) 0 = Disabled 1 = Enabled 13 ISRC1_INT3_ENA 0 ISRC1 INT3 Enable (Interpolation Channel 3 path from ISRC1_FSL rate to ISRC1_FSH rate) 0 = Disabled 1 = Enabled 12 ISRC1_INT4_ENA 0 ISRC1 INT4 Enable (Interpolation Channel 4 path from ISRC1_FSL rate to ISRC1_FSH rate) 0 = Disabled 1 = Enabled 9 ISRC1_DEC1_ ENA 0 ISRC1 DEC1 Enable (Decimation Channel 1 path from ISRC1_FSH rate to ISRC1_FSL rate) 0 = Disabled 1 = Enabled 8 ISRC1_DEC2_ ENA 0 ISRC1 DEC2 Enable (Decimation Channel 2 path from ISRC1_FSH rate to ISRC1_FSL rate) 0 = Disabled 1 = Enabled 7 ISRC1_DEC3_ ENA 0 ISRC1 DEC3 Enable (Decimation Channel 3 path from ISRC1_FSH rate to ISRC1_FSL rate) 0 = Disabled 1 = Enabled 6 ISRC1_DEC4_ ENA 0 ISRC1 DEC4 Enable (Decimation Channel 4 path from ISRC1_FSH rate to ISRC1_FSL rate) 0 = Disabled 1 = Enabled R3827 (0x0EF3) ISRC2_CTRL_1 14:11 ISRC2_FSH[3:0] 0000 ISRC2 High Sample Rate (Sets the higher of the ISRC2 sample rates) 0000 = SAMPLE_RATE_1 0001 = SAMPLE_RATE_2 0010 = SAMPLE_RATE_3 All other codes are reserved. The selected sample rate is valid in the range 8 kHz to 192 kHz. All ISRC2_DECn_SRC fields must be cleared before changing ISRC2_FSH. |
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