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LT7200SAVPBF Datenblatt(PDF) 23 Page - Analog Devices |
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LT7200SAVPBF Datenblatt(HTML) 23 Page - Analog Devices |
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23 / 35 page ![]() Data Sheet LT7200S analog.com Rev 0 23 of 35 Figure 36. External Compensation Network Select the proper ITH components for OPTI-LOOP® optimization. The compensation network is shown in Figure 36. The RC filter sets the dominant pole-zero loop compensation. The gain of the loop increases with the RITH and the bandwidth of the loop increases with decreasing CITH. If RITH is increased by the same factor that CITH is decreased, the zero frequency is kept the same, thereby keeping the phase the same in most critical frequency ranges of the feedback loop. For a 1MHz application, an R-C network of 470pF and 10kΩ provides a good starting point. A 4.7pF bypass capacitor, CITHP, on the ITH pin is recommended to filter out high frequency coupling from stray board capacitance. Table 6 provides a basic guideline for the compensation values to use, given the frequency of the part. Slight tweaks to those values may be required depending on the application's required output capacitance. Table 6. Compensation Values Frequency RITH CITH CITHP 500kHz 15k 470pF 4.7pF 700kHz 10k 470pF 4.7pF 1MHz 10k 470pF 4.7pF 1.5MHz 10k 470pF 4.7pF 2MHz 10k 220pF 4.7pF Checking Transient Response The OPTI-LOOP compensation allows the transient response to be optimized for a wide range of loads and output capacitors. The availability of the ITH pin not only allows for optimization of the control loop behavior but also provides a DC-coupled and AC-filtered closed loop response test point. The DC step, rise time, and settling at this test point truly reflects these close loop response. Assuming a predominantly second order system, phase margin and/or damping factor can be estimated using the percentage of overshoot seen at this pin. The ITH external component shown in the Table 6 circuit provides an adequate starting point for most applications. The RC filter sets the dominant pole-zero loop compensation. The values can be modified slightly (from 0.5 to 2 times their suggested value) to optimize transient response once the final PC layout is done and the output capacitor type and value are determined. Select the output capacitors because their various types and values determine the loop feedback factor gain and phase. In addition, add a feedforward capacitor CFF to improve the high frequency response, as shown in Figure 33. Capacitor CFF provides phase lead by creating a high frequency zero with R2, which improves the phase margin. An output current pulse of 20% to 100% of full load current having a rise time of ~1μs produces output voltage and ITH pin waveforms that give a sense of the overall loop stability without breaking the feedback loop. Switching regulators may take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to the ΔILOAD x ESR, where ESR is the effective series resistance of COUT. ΔILOAD also begins to RITH ITH CITHP CITH |
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