Data Sheet

LT7200S

analog.com

Rev 0

24 of 35

charge or discharge COUT, generating a feedback error signal used by the regulator to return VOUT to its steady-state

value. During this recovery time, VOUT can be monitored for overshoot or ringing that indicates a stability problem.

The initial output voltage step may not be within the bandwidth of the feedback loop, so the standard second order

overshoot/DC ratio cannot be used to determine phase margin. The output voltage settling behavior is related to the

stability of the closed-loop system and demonstrates the actual overall supply performance. For detailed

explanation of optimizing the compensation components, including a review of control loop theory, refer to Analog

Devices Application Note 76.

In some applications, a more severe transient can be caused by switching in loads with large (> 47μF) input

capacitors. The discharge input capacitors are effectively put in parallel with COUT, causing a rapid drop in VOUT. No

regulator can deliver enough current to prevent this problem if the switch connecting the load has low resistance

and is driven quickly. The solution is to limit the turn-on speed of the load switch driver. A hot swap controller is

designed specifically for this purpose and usually incorporates current limiting, short-circuit protection, and soft-

starting.

Efficiency Considerations

The percent efficiency of a switching regulator is equal to the output power divided by the input power times 100%.

It is often useful to analyze individual losses to determine what is limiting the efficiency and which change

produces the most improvement. Percent efficiency can be expressed as:

% Efficiency = 100% – (L1 + L2 + L3 + …)

where L1, L2, etc., are the individual losses as a percentage of input power.

Although all dissipative elements in the circuit produce losses, three main sources usually account for most of the

losses in LT7200S circuits: 1) I2R losses, 2) switching and biasing losses, 3)other losses.



I2R losses are calculated from the DC resistances of the internal switches, RSW, and external inductor, RL. In

continuous mode, the average output current flows through inductor L but is “chopped” between the internal

top and bottom power MOSFETs. Thus, the series resistance looking into the SW pin is a function of both top and

bottom MOSFET RDS(ON) and the duty cycle (DC) as follows:

RSW = (RDS(ON)TOP) (DC) + (RDS(ON)BOT) (1 – DC)

The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance

Characteristics curves. Thus to obtain I2R losses:

I2R losses = IOUT2 (RSW + RL)



The switching current is the sum of the MOSFET driver and control currents. The power MOSFET driver current

results from switching the gate capacitance of the power MOSFETs. Each time a power MOSFET gate is switched

from low to high to low again, a packet of charge dQ moves from PVIN to ground. The resulting dQ/dt is a current

out of IN typically much larger than the DC control bias current. In continuous mode, IGATECHG = f(QT + QB), where QT

and QB are the gate charges of the internal top and bottom power MOSFETs, and f is the switching frequency. The

power loss is thus:

Switching Loss = IGATECHG x PVIN

The gate charge loss shows up as current through the INTVCC pin as well as frequency. Thus, their effects are more

pronounced in applications with higher input voltage and higher frequency.