LTC3314AACBZ-R7 datasheet(22/26 Pages) AD

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LTC3314A

Rev. 0

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4. Connect the ground side of any FB and RT compo-

nents to AGND (Lead D5). Connect a 1µF decoupling

capacitor from AVIN (Lead C5) to AGND, close to the

pins. For all layouts, only connect AGND to the rest of

the PCB ground plane in one location, to prevent tran-

sient currents in the ground plane from also flowing

through the AGND trace, which would cause voltage

noise between AGND referenced circuits.

For dual buck applications, connect the AGND pin to

the ground plane with a single via, close to the AGND

lead. Use an unbroken low resistance ground plane to

minimize any voltage drops between AGND and the

negative terminals of the output capacitors.

For 2-phase, single output designs, optionally con-

nect the AGND lead to the negative terminal of the

output capacitor (COUT) at the load. This will reduce

any load regulation caused by voltage drops between

the ground at the load and the LTC3314A voltage

reference ground. The AGND node carries very little

current and, therefore, can be a minimal size trace.

The ground side of any FB and RT components, and

the AVIN capacitor ground should connect to the

AGND node.

5. Care should be taken in the layout of the PCB to

ensure good heat sinking of the LTC3314A. Connect

the PGND leads to a large metal area on the top layer.

Connect the top layer ground metal to ground plane(s)

on lower levels with many thermal vias. These layers

will spread heat dissipated by the LTC3314A. The

junction temperature, TJ, is calculated from the ambi-

ent temperature, TA as given by Equation 11.

TJ = TA + (PD • θJA)

(11)

Where θJA is approximately 58°C/W.

Power dissipation within the LTC3314A is estimated

by calculating the total power loss from an efficiency

measurement and subtracting the inductor loss.

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LTC3314AACBZ-R7 Datenblatt(PDF) 22 Page - Analog Devices