AT25DF021A datasheet(23/59 Pages) RENESAS

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DS-AT25DF021A-042 Rev. J

Page 23

12/22/22

AT25DF021A Datasheet

Protection Commands and Features

9.1

Write Enable

The Write Enable command is used to set the Write Enable Latch (WEL) bit in the Status Register to a logical 1

state. The WEL bit must be set before a Byte/Page Program, Erase, Program OTP Security Register, or Write

Status Register command can be executed. This makes the issuance of these commands a two step process,

thereby reducing the chances of a command being accidentally or erroneously executed. If the WEL bit in the

Status Register is not set prior to the issuance of one of these commands, then the command is not executed.

To issue the Write Enable command, the CS pin must first be asserted and the opcode of 06h must be clocked

into the device. No address bytes need to be clocked into the device, and any data clocked in after the opcode is

ignored. When the CS pin is deasserted, the WEL bit in the Status Register is set to a logical 1. The complete

opcode must be clocked into the device before the CS pin is deasserted, and the CS pin must be deasserted on

an even byte boundary (multiples of eight bits); otherwise, the device aborts the operation and the state of the

WEL bit does not change.

Figure 19. Write Enable

9.2

Write Disable

The Write Disable command is used to reset the Write Enable Latch (WEL) bit in the Status Register to the logical

0 state. With the WEL bit reset, all Byte/Page Program, Erase, Program OTP Security Register, and Write Status

refer to the WEL bit section of the Status Register description.

To issue the Write Disable command, the CS pin must first be asserted and the opcode of 04h must be clocked

into the device. No address bytes need to be clocked into the device, and any data clocked in after the opcode is

ignored. When the CS pin is deasserted, the WEL bit in the Status Register is reset to a logical 0. The complete

opcode must be clocked into the device before the CS pin is deasserted, and the CS pin must be deasserted on

an even byte boundary (multiples of eight bits); otherwise, the device aborts the operation and the state of the

WEL bit does not change.

Figure 20. Write Disable

SCK

MSB

00000110

OPCODE

High-Impedance

SCK

MSB

00000100

OPCODE

High-Impedance

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