FN9299 Rev.3.1

Page 27 of 53

May 27, 2021

ISL81601

5. Functional Description

capacitor connected from the SS/TRK pin to GND. The voltage error amplifier reference voltage is clamped to the

voltage on the SS/TRK pin. The output voltage thus rises from 0V to regulation as SS/TRK rises from 0V to 0.8V.

Charging of the soft-start capacitor continues until the voltage on the SS/TRK pin reaches 3V.

Typical applications for ISL81601 use programmable analog soft-start or the SS/TRK pin for tracking. The soft-

start time can be set by the value of the soft-start capacitor connected from SS/TRK to GND. Inrush current during

start-up can be alleviated by adjusting the soft-starting time.

The typical soft-start time is set according to Equation 2:

When the soft-starting time set by external CSS or tracking is less than 1.7ms, an internal soft-start circuit of 1.7ms

takes over the soft-start.

PGOOD toggles to high when the output voltage is in regulation.

Pulling the EN/UVLO lower than the EN falling threshold VENSS_THF typical 0.9V, disables the PWM output and

internal LDOs to achieve low standby current. The SS/TRK pin is also discharged to GND by an internal MOSFET

with 70Ω rDS(ON). For applications with a larger than 1µF capacitor on the SS/TRK pin, Renesas recommends

adding a 100Ω to 1kΩ resistor in series with the capacitor to share the power loss at the discharge.

With use of the accurate UVLO threshold, an accurate VIN Undervoltage Protection (UVP) feature can be

implemented by feeding the VIN into the EN/UVLO pin using a voltage divider, RUV1 and RUV2, shown in

Figure 42.

Figure 42. VIN Undervoltage Protection

The VIN UVP rising threshold can be calculated by Equation 3.

where VUVLO_THR is the EN/UVLO pin UVLO rising threshold, typically 1.8V.

The VIN UVP falling threshold can be calculated by Equation 4.

where IUVLO_HYST is the UVLO hysteresis current, typically 4.2µA.

tSS

0.8V

CSS

2

A

-----------





=

(EQ. 2)

EN/UVLO

VIN

RUV1

RUV2

ISL81601

VUVRISE

VUVLO_THR RUV1 RUV2

+

 1.1x10 6

–

–

RUV1RUV2

RUV2

--------------------------------------------------------------------------------------------------------------------------------------------

=

(EQ. 3)

VUVFALL

VUVLO_THR RUV1 RUV2

+

 I

UVLO_HYST

–

RUV1RUV2

RUV2

--------------------------------------------------------------------------------------------------------------------------------------------------------

=

(EQ. 4)