TMPR4955AF datasheet(97/168 Pages) TOSHIBA

97 / 168 page

Chapter 6 TX4955A System Interface

6-25

6.2.10

System Interface cycle time

In the case of a processor, there is a response time for each kind of processor transaction

and for each external request. A minimum and maximum cycle count has been prescribed

for each response time. Since processor requests themselves are restrained by system

interface request protocols, checking the protocols makes it possible to determine the cycle

count required for requests. The interval for the next interface operation is variable within

the range of the minimum and maximum cycle counts.

•

Stand-by time from when an external request is received and the processor

releases the system interface, until when the interface enters the slave state

(release latency).

•

Response time to external request that requires a response (external response

latency).

6.2.10.1 Release latency

Broadly defined, release latency is the number of cycles for which it is possible to

wait from when the processor receives an external request until when the system

interface is released and shifts to the slave state. If there are no processor requests

currently in progress, the processor must delay release of the system interface for a

few cycles since it is internal operation. Therefore, if release latency is strictly defined,

it becomes the cycle count from when the ExtRqst* signal is asserted until when the

Release* signal is asserted.

There are three types of release latency.

•

Category 1: If external request signal is asserted 2 cycles before the final cycle

of the processor request

•

Category 2: If external request signal is asserted during processor request or

is the final cycle even if it is asserted

•

Category 3: If processor automatically shifts to the slave state

Table 6.2.6 indicates the minimum and maximum release latency inherent to categories

1, 2, and 3. However, note that these cycle counts may be changed at any time.

Table 6.2.6 Release Latency for External Requests

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