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BST120 Datenblatt(PDF) 3 Page - NXP Semiconductors

Teilenummer BST120
Bauteilbeschribung  P-channel enhancement mode vertical D-MOS transistor
PDF  12 Pages
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Hersteller  PHILIPS [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

BST120 Datenblatt(HTML) 3 Page - NXP Semiconductors

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April 1995
3
Philips Semiconductors
Product specification
P-channel enhancement mode vertical
D-MOS transistor
BST120
RATINGS
Limiting values in accordance with the Absolute Maximum System (IEC 134)
THERMAL RESISTANCE
Note
1. Transistor mounted on ceramic substrate: area = 2,5 cm2 and thickness = 0,7 mm.
Drain-source voltage
−V
DS
max.
60 V
Gate-source voltage (open drain)
±V
GSO
max.
20 V
Drain current (DC)
−I
D
max.
0.3 A
Drain current (peak)
−I
DM
max.
0.8 A
Total power dissipation up to Tamb = 25 °C (note 1)
Ptot
max.
1 W
Storage temperature range
Tstg
−65 to + 150 °C
Junction temperature
Tj
max.
150
°C
From junction to ambient (note 1)
Rth j-a
=
125 K/W



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