SCF5249VM140 datasheet(11/56 Pages) FREESCALE

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SCF5249 Functional Overview

SCF5249 Integrated ColdFire® Microprocessor Data Sheet, Rev. 3

Freescale Semiconductor

5.16 IDE and SmartMedia Interfaces

The SCF5249 system bus allows connection of an IDE hard disk drive and SmartMedia flash card with a

minimum of external hardware. The external hardware consists of bus buffers for address and data and are

intended to reduce the load on the bus and prevent SDRAM and Flash accesses to propagate to the IDE

bus. The control signals for the buffers are generated in the SCF5249.

5.17 Analog/Digital Converter (ADC)

The four channel ADC is a based on the Sigma-Delta concept with 12-bit resolution. The digital portion

of the ADC is provided internally. The analog voltage comparator must be provided externally as well as

an external integrator circuit (resistor/capacitor) which is driven by the ADC output. A software interrupt

is provided when the ADC measurement cycle is complete.

5.18 Flash Memory Card Interface

The interface is Sony MemoryStick and SecureDigital compatible. However, there is no hardware support

for MagicGate.

5.19 I2C Module

The two-wire I2C bus interface, which is compliant with the Philips I2C bus standard, is a bidirectional

serial bus that exchanges data between devices. The I2C bus minimizes the interconnection between

devices in the end system and is best suited for applications that need occasional bursts of rapid

communication over short distances among several devices. Bus capacitance and the number of unique

addresses limit the maximum communication length and the number of devices that can be connected.

5.20 Chip-Selects

Two programmable chip-select outputs provide signals that enable glueless connection to external memory

and peripheral circuits. The base address, access permissions and automatic wait-state insertion are

programmable with configuration registers. These signals also interface to 16-bit ports.

CS0 is active after reset to provide boot-up from external FLASH/ROM.

5.21 GPIO Interface

A total of 44 General Purpose inputs and 46 General Purpose outputs are available. These are multiplexed

with various other signals. Eight of the GPIO inputs have edge sensitive interrupt capability.

5.22 Interrupt Controller

The interrupt controller provides user-programmable control of a total of 57 interrupts. There are 49

internal interrupt sources. In addition, there are 8 GPIOs where interrupts can be generated on the rising

or falling edge of the pin. All interrupts are autovectored and interrupt levels are programmable.

SCF5249VM140 Datenblatt(PDF) 11 Page - Freescale Semiconductor, Inc