SX28ACSLASHSS datasheet(27/51 Pages) PARALLAX

27 / 51 page

Parallax SX20AC/SX28AC

www.parallax.com

Page 27 of 51

Rev 1.6 11/20/2006

11.0 COMPARATOR

The device contains an on-chip differential comparator.

Ports RB0-RB2 support the comparator. Ports RB1 and

RB2 are the comparator negative and positive inputs,

respectively, while Port RB0 serves as the comparator

output pin. To use these pins in conjunction with the

comparator, the user program must configure Ports RB1

and RB2 as inputs and Port RB0 as an output. The

CMP_B register is used to enable the comparator, to read

the output of the comparator internally, and to enable the

output of the comparator to the comparator output pin.

The comparator enable bits are set to “1” upon reset, thus

disabling the comparator. To avoid drawing additional

current during the power down mode, the comparator

should be disabled before entering the power down mode.

Here is an example of how to setup the comparator and

read the CMP_B register.

mov

M,#$08

;set MODE register to access

;CMP_B

mov

W,#$00

;clear W

mov

!RB,W

;enable comparator and its

;output

;delay after enabling

;comparator for response

mov

M,#$08

;set MODE register to access

;CMP_B

mov

W,#$00

;clear W

mov

!RB,W

;enable comparator and its

;output and also read CMP_B

;(exchange W and CMB_B)

and

W,#$01

;set/clear Z bit based on

;comparator result

snb

$03.2

;test Z bit in STATUS reg

;(0 => RB2<RB1)

jmp

rb2_hi

;jump only if RB2>RB1

The final “mov” instruction in this example performs an

exchange of data between the working register (W) and

the CMP_B register. This exchange occurs only with Port

B accesses. Otherwise, the “mov” instruction does not

perform an exchange, but only moves data from the

source to the destination.

Figure 11-1 shows the comparator block diagram.

CMP_B - Comparator Enable/Status Register

Comparator result: 1 for RB2>RB1 or 0

for RB2<RB1. Comparator must be

enabled (CMP_EN = 0) to read the

result. The result can be read whether or

not the CMP_OE bit is cleared.

When cleared to 0, it enables the

comparator output to the RB0 pin.

When cleared to 0, it enables the

comparator.

Figure 11-1:

Comparator

Block Diagram

CMP

Reserved

CMP_RES

Bit 7

Bit 6

Bits 5-1

Bit 0

RES

CMP _

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