68HC05PL4B datasheet(92/98 Pages) FREESCALE

92 / 98 page

GENERAL RELEASE SPECIFICATION

April 30, 1998

MC68HC05PL4

A-2

REV 2.0

Figure A-1. MC68HC705PL4B Memory Map

A.4.1 EPROM Program Control Register (PCN)

This register is provided for programming the on-chip EPROM in the

MC68HC705PL4.

ELAT – EPROM LATch control

0 = EPROM address and data bus con gured f or normal reads

1 = EPROM address and data bus con gured for programming (writes

to EPROM cause address and data to be latched). EPROM is in

programming mode and cannot be read if ELAT is 1. This bit should

not be set when no programming voltage is applied to the VPP pin.

PCR

$001E

bit-7

bit-6

bit-5

bit4

bit-3

bit-2

bit1

bit-0

Read

RESERVED

ELAT

PGM

Write

Reset

0000

000

I/O REGISTERS

32 BYTES

USER RAM

256 BYTES

UNUSED

USER EPROM

4096 BYTES

BOOTSTRAP ROM

496 BYTES

$0000

$001F

$0020

$011F

$0120

$0DFF

$0E00

$1DFF

$1E00

$1FEF

$1FFF

$1FF0

$00C0

$00FF

STACK

64 BYTES

USER VECTORS

16 BYTES

RESERVED

KEYBOARD

8-BIT TIMER

16-BIT TIMER

IRQ

SWI

RESET

$1FF0-$1FF1

$1FF2-$1FF3

$1FF4-$1FF5

$1FF6-$1FF7

$1FF8-$1FF9

$1FFA-$1FFB

$1FFC-$1FFD

$1FFE-$1FFF

Freescale Semiconductor, Inc.

For More Information On This Product,

Go to: www.freescale.com

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