L99PM72PXP datasheet(9/128 Pages) STMICROELECTRONICS

9 / 128 page

L99PM72PXP

List of figures

Doc ID 023553 Rev 3

9/128

List of figures

Figure 1.

Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Figure 2.

Pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 3.

Voltage source with external PNP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 4.

Voltage source with external PNP and current limitation . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 5.

Voltage source with external NPN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 6.

Voltage source with external NPN and current limitation . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 7.

Voltage regulator behaviour and diagnosis during supply voltage ramp-up / ramp-down

conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 8.

Sequence to enter and exit SW Debug Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 9.

Main operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Figure 10.

Watchdog in normal operating mode (no errors) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 11.

Watchdog with error conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 12.

Watchdog in FLASH Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 13.

Change watchdog timing within long open window . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 14.

Change watchdog timing within window mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 15.

General procedure to change watchdog timing out of Fail safe mode . . . . . . . . . . . . . . . . 28

Figure 16.

Change watchdog timing out of Fail safe mode (Watchdog failure) . . . . . . . . . . . . . . . . . . 28

Figure 17.

Example: exit Fail-Safe mode from Watchdog failure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Figure 18.

Master node configuration using LIN_PU (optional) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33

Figure 19.

Transceiver state diagram if selective wake-up is disabled (CR16 SW_EN = 0) . . . . . . . . 35

Figure 20.

CAN transceiver state diagram if selective wake-up is enabled (CR16 SW_EN = 1). . . . . 36

Figure 21.

CAN wake up capabilities . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Figure 22.

Overvoltage and undervoltage protection and diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Figure 23.

Thermal shutdown protection and diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Figure 24.

Phase shifted PWM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Figure 25.

Typical application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Figure 26.

Thermal data of PowerSSO-36. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

Figure 27.

PowerSSO-36 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

Figure 28.

PowerSSO-36 thermal resistance junction to ambient vs PCB copper area (V1 ON) . . . . 53

Figure 29.

PowerSSO-36 thermal impedance junction to ambient vs PCB copper area (single pulse

with V1 ON). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

Figure 30.

PowerSSO-36 thermal fitting model (V1 ON) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

Figure 31.

Watchdog timing (long, early, late and safe window) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

Figure 32.

Watchdog early, late and safe windows . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

Figure 33.

LIN transmit, receive timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

Figure 34.

SPI - transfer timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

Figure 35.

SPI input timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

Figure 36.

SPI output timing (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

Figure 37.

SPI CSN - output timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75

Figure 38.

SPI - CSN low to high transition and global status bit access . . . . . . . . . . . . . . . . . . . . . . 75

Figure 39.

Read configuration register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

Figure 40.

Write configuration register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

Figure 41.

Format of data shifted out at SDO during write cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

Figure 42.

Format of data shifted out at SDO during read cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82

Figure 43.

Format of data shifted out at SDO during read and clear status operation . . . . . . . . . . . . 84

Figure 44.

PowerSSO-36 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125

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