HD6432351 datasheet(10/1025 Pages) RENESAS

10 / 1025 page

Rev. 3.00 Sep 15, 2006 page x of xxxiv

Item

Page

Revision (See Manual for Details)

12.3.3 Timing of

Setting Overflow Flag

(OVF)

Figure 12.6 Timing of

Setting of OVF

542

Figure 12.6 amended

TCNT

H'FF

H'00

Overflow signal

(internal signal)

OVF

13.2.8 Bit Rate

Table 13.3 BRR

Settings for Various Bit

Rates (Asynchronous

Mode)

564

Table 13.3 amended

φ = 7.3728 MHz

Bit Rate

(bit/s)

Error

(%)

19200

0.00

31250

—

38400

0. 00

14.1 Features

611

Description amended

Features of the Smart Card interface supported by the

H8S/2350 Group are as follows.

14.2.2 Serial Status

617

Bit 4

ERS

Bit table amended

Bit 4

ERS

Description

Indicates that data was received normally and no error signal was sent

[Clearing conditions]

(Initial value)

Upon reset, and in standby mode or module stop mode

When 0 is written to ERS after reading ERS = 1

Indicates that an error signal was sent from the receiving side showing that a parity

error was detected

[Setting condition]

When the low level of the error signal is sampled

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