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HD6432351 Datenblatt(PDF) 30 Page - Renesas Technology Corp

Teilenummer HD6432351
Bauteilbeschribung  16-Bit Single-Chip Microcomputer
PDF  1025 Pages
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Hersteller  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

HD6432351 Datenblatt(HTML) 30 Page - Renesas Technology Corp

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Rev. 3.00 Sep 15, 2006 page xxx of xxxiv
15.1.1 Features................................................................................................................ 641
15.1.2 Block Diagram ..................................................................................................... 642
15.1.3 Pin Configuration................................................................................................. 643
15.1.4 Register Configuration ......................................................................................... 645
15.2 Register Descriptions ........................................................................................................ 645
15.2.1 A/D Data Registers A to D (ADDRA to ADDRD).............................................. 645
15.2.2 A/D Control/Status Register (ADCSR)................................................................ 646
15.2.3 A/D Control Register (ADCR)............................................................................. 648
15.2.4 Module Stop Control Register (MSTPCR) .......................................................... 649
15.3 Interface to Bus Master ..................................................................................................... 650
15.4 Operation........................................................................................................................... 651
15.4.1 Single Mode (SCAN = 0)..................................................................................... 651
15.4.2 Scan Mode (SCAN = 1) ....................................................................................... 653
15.4.3 Input Sampling and A/D Conversion Time.......................................................... 655
15.4.4 External Trigger Input Timing ............................................................................. 656
15.5 Interrupts ........................................................................................................................... 657
15.6 Usage Notes ...................................................................................................................... 657
Section 16 D/A Converter................................................................................................. 663
16.1 Overview........................................................................................................................... 663
16.1.1 Features................................................................................................................ 663
16.1.2 Block Diagram ..................................................................................................... 664
16.1.3 Pin Configuration................................................................................................. 665
16.1.4 Register Configuration ......................................................................................... 665
16.2 Register Descriptions ........................................................................................................ 666
16.2.1 D/A Data Registers 0 and 1 (DADR0, DADR1).................................................. 666
16.2.2 D/A Control Register (DACR)............................................................................. 666
16.2.3 Module Stop Control Register (MSTPCR) .......................................................... 668
16.3 Operation........................................................................................................................... 669
Section 17 RAM .................................................................................................................. 671
17.1 Overview........................................................................................................................... 671
17.1.1 Block Diagram ..................................................................................................... 671
17.1.2 Register Configuration ......................................................................................... 672
17.2 Register Descriptions ........................................................................................................ 672
17.2.1 System Control Register (SYSCR) ...................................................................... 672
17.3 Operation........................................................................................................................... 673
17.4 Usage Note........................................................................................................................ 673
Section 18 ROM (H8S/2351 Only) ................................................................................ 675
18.1 Overview........................................................................................................................... 675



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