| Datenblatt-Suchmaschine für elektronische Bauteile |
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H8SX/1663 Datenblatt(PDF) 455 Page - Renesas Technology Corp |
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H8SX/1663 Datenblatt(HTML) 455 Page - Renesas Technology Corp |
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455 / 1158 page ![]() Section 8 Data Transfer Controller (DTC) Rev.1.00 Jun. 07, 2006 Page 403 of 1102 REJ09B0294-0100 Bit Bit Name Initial Value R/W Description 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 DTCE15 DTCE14 DTCE13 DTCE12 DTCE11 DTCE10 DTCE9 DTCE8 DTCE7 DTCE6 DTCE5 DTCE4 DTCE3 DTCE2 DTCE1 DTCE0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W DTC Activation Enable 15 to 0 Setting this bit to 1 specifies a relevant interrupt source to a DTC activation source. [Clearing conditions] • When writing 0 to the bit to be cleared after reading 1 • When the DISEL bit is 1 and the data transfer has ended • When the specified number of transfers have ended These bits are not cleared when the DISEL bit is 0 and the specified number of transfers have not ended 8.2.8 DTC Control Register (DTCCR) DTCCR specifies transfer information read skip. Bit Bit Name Initial Value R/W Note: * Only 0 can be written to clear the flag. 7 0 R/W 6 0 R/W 5 0 R/W 4 RRS 0 R/W 3 RCHNE 0 R/W 2 0 R 1 0 R 0 ERR 0 R/(W)* Bit Bit Name Initial Value R/W Description 7 to 5 All 0 R/W Reserved These bits are always read as 0. The write value should always be 0. |
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