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H8SX/1663R Datenblatt(PDF) 351 Page - Renesas Technology Corp

Teilenummer H8SX/1663R
Bauteilbeschribung  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1504 Pages
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Hersteller  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8SX/1663R Datenblatt(HTML) 351 Page - Renesas Technology Corp

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Section 9 Bus Controller (BSC)
Rev. 2.00 Sep. 24, 2008 Page 319 of 1468
REJ09B0412-0200
9.11.11
Controlling Byte and Word Accesses
When 16-bit bus SDRAM is used, byte and word accesses are performed through the control of
DQMLU and DQMLL.
Figures 9.69 and 9.70 show control timing examples of the DQM signals in the big endian format.
Figure 9.71 shows a connection example when the DQM signals are used for the byte and word
control.
T
p
T
r
T
c1
T
cl
T
c2
Address bus
Row address
Column address
SDRAM
φ
CS
Precharge-sel
RAS
CAS
WE
CKE
PALL
ACTV
READ
NOP
DQMLU
DQMLL
D7 to D0
BS
RD/
WR
D15 to D8
Row
address
High
High
Hi-Z
Figure 9.69 Control Timing Example of Byte Control by DQM in 16-Bit Access Space
(Read Access with Lowest Bit of Address = B'0)



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