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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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H8SX/1663R Datenblatt(PDF) 353 Page - Renesas Technology Corp |
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H8SX/1663R Datenblatt(HTML) 353 Page - Renesas Technology Corp |
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353 / 1504 page  Section 9 Bus Controller (BSC) Rev. 2.00 Sep. 24, 2008 Page 321 of 1468 REJ09B0412-0200 RAS CAS WE DQMU DQML CLK CKE CS A11 (BA1) A10 (BA0) A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 DQ15 to DQ0 RAS CAS WE DQMLU DQMLL SD φ OE/CKE CS A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 D15 to D0 This LSI (Address shifted by 8 bis) 64-Mbit synchronous DRAM (1 Mwords × 16 bits × 4 banks) 10-bit column address Row address: A11 to A0 Column address: A9 to A0 Bank select address: A11/A10 Figure 9.71 Connection Example of DQM Byte/Word Control 9.11.12 Fast-Page Access Operation Besides an accessing method in which this LSI outputs a row address every time it accesses the SDRAM (called full access or normal access), some SDRAMs have a fast-page mode function in which fast speed access can be achieved by modifying only a column address with the same row address output when consecutive accesses are made to the same row address. The fast-page mode can be used by setting the BE bit in DRAMCR to 1. |
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