PSD4235G2 datasheet(28/93 Pages) STMICROELECTRONICS

28 / 93 page

Preliminary Information

PSD4000 Series

The

PSD4000

Functional

Blocks

(cont.)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Sec7_Prot

Sec6_Prot

Sec5_Prot

Sec4_Prot

Sec3_Prot

Sec2_Prot

Sec1_Prot Sec0_Prot

Flash Protection Register

9.1.1.9.2 Reset Instruction

The Reset instruction consists of one write cycle (see Table 8). It can also be optionally

preceded by the standard two write decoding cycles (writing AAh to AAAh and 55h to

554h).

The Reset instruction must be executed after:

1. Reading the Flash Protection status or Flash ID using the Flash instruction.

2. When an error condition occurs (DQ5 (DQ13) goes high) during a Flash programming

or erase cycle.

The Reset instruction will reset the Flash to normal Read Mode immediately. However, if

there is an error condition (DQ5 (DQ13) goes high), the Flash memory will return to the

Read Mode in 25 µSeconds after the Reset instruction is issued.

The Reset instruction is ignored when it is issued during a Flash programming or Bulk

Erase cycle. The Reset instruction will abort the on going sector erase cycle and return the

Flash memory to normal Read Mode in 25 µSeconds.

9.1.1.9.3 Reset Pin Input

The reset pulse input from the pin will abort any operation in progress and reset the Flash

memory to Read Mode. When the reset occurs during a programming or erase cycle, the

Flash memory will take up to 25 µSeconds to return to Read Mode. It is recommended that

the reset pulse (except power on reset, see Reset Section) be at least 25 µSeconds such

that the Flash memory will always be ready for the MCU to fetch the boot code after reset

is over.

Bit Definitions:

Sec_Prot

1 = Main Flash Sector is write protected.

Sec_Prot

0 = Main Flash Sector is not write protected.

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Security_

***

Sec3_Prot

Sec2_Prot

Sec1_Prot Sec0_Prot

Bit

Flash Boot Protection Register

Bit Definitions:

Sec_Prot

1 = Flash Boot Sector is write protected.

Sec_Prot

0 = Flash Boot Sector is not write protected.

Security_Bit

0 = Security Bit in device has not been set.

1 = Security Bit in device has been set.

Table 10. Sector Protection/Security Bit Definition

*: Not used.

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