AT25DF321A-MH-T datasheet(23/58 Pages) ATMEL

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3686C–DFLASH–12/08

AT25DF321A [Preliminary]

A23-A0 will be set to the logical “1” state, and the sector itself will then be protected from pro-

gram and erase operations. In addition, the WEL bit in the Status Register will be reset back to

the logical “0” state.

The complete three address bytes must be clocked into the device before the CS pin is deas-

serted, and the CS pin must be deasserted on an even byte boundary (multiples of eight bits);

otherwise, the device will abort the operation. When the device aborts the Protect Sector opera-

tion, the state of the Sector Protection Register will be unchanged, and the WEL bit in the Status

As a safeguard against accidental or erroneous protecting or unprotecting of sectors, the Sector

Protection Registers can themselves be locked from updates by using the SPRL (Sector Protec-

tion Registers Locked) bit of the Status Register (please refer to the Status Register description

for more details). If the Sector Protection Registers are locked, then any attempts to issue the

Protect Sector command will be ignored, and the device will reset the WEL bit in the Status Reg-

ister back to a logical “0” and return to the idle state once the CS pin has been deasserted.

Figure 9-3.

Protect Sector

9.4

Unprotect Sector

Issuing the Unprotect Sector command to a particular sector address will reset the correspond-

ing Sector Protection Register to the logical “0” state (see Table 9-1 for Sector Protection

tection Register that is used to control the software protection of a sector.

Before the Unprotect Sector command can be issued, the Write Enable command must have

been previously issued to set the WEL bit in the Status Register to a logical “1”. To issue the

Unprotect Sector command, the CS pin must first be asserted and the opcode of 39h must be

clocked into the device. After the opcode has been clocked in, the three address bytes designat-

ing any address within the sector to be unprotected must be clocked in. Any additional data

clocked into the device after the address bytes will be ignored. When the CS pin is deasserted,

the Sector Protection Register corresponding to the sector addressed by A23-A0 will be reset to

the logical “0” state, and the sector itself will be unprotected. In addition, the WEL bit in the Sta-

tus Register will be reset back to the logical “0” state.

The complete three address bytes must be clocked into the device before the CS pin is deas-

serted, and the CS pin must be deasserted on an even byte boundary (multiples of eight bits);

otherwise, the device will abort the operation, the state of the Sector Protection Register will be

unchanged, and the WEL bit in the Status Register will be reset to a logical “0”.

SCK

MSB

00110110

410 11

812

29 30

27 28

OPCODE

AAAA

AAA

ADDRESS BITS A23-A0

HIGH-IMPEDANCE

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