AT25DF321A-MH-T datasheet(30/58 Pages) ATMEL

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3686C–DFLASH–12/08

AT25DF321A [Preliminary]

the Sector Lockdown Registers can be made (see “Freeze Sector Lockdown State” below). If

the Sector Lockdown command is disabled or if the sector lockdown state is frozen, then any

attempts to issue the Sector Lockdown command will be ignored, and the device will reset the

WEL bit in the Status Register back to a logical “0” and return to the idle state once the CS pin

has been deasserted.

Figure 10-1. Sector Lockdown

10.2

Freeze Sector Lockdown State

The current sector lockdown state can be permanently frozen so that no further modifications to

the Sector Lockdown Registers can be made; therefore, the Sector Lockdown command will be

permanently disabled, and no additional sectors can be locked down aside from those already

locked down. Any attempts to issue the Sector Lockdown command after the sector lockdown

state has been frozen will be ignored.

Before the Freeze Sector Lockdown State command can be issued, the Write Enable command

must have been previously issued to set the WEL bit in the Status Register to a logical “1”. In

addition, the Sector Lockdown Enabled (SLE) bit in the Status Register must have also been

previously set to the logical “1” state. To issue the Freeze Sector Lockdown State command, the

CS pin must first be asserted and the opcode of 34h must be clocked into the device followed by

three command specific address bytes of 55AA40h. After the three address bytes have been

clocked in, a confirmation byte of D0h must be clocked in immediately following the three

address bytes. Any additional data clocked into the device will be ignored. When the CS pin is

deasserted, the current sector lockdown state will be permanently frozen within a time of t

LOCK.

In addition, the WEL bit in the Status Register will be reset back to the logical “0” state, and the

SLE bit will be permanently reset to a logical “0” to indicate that the Sector Lockdown command

is permanently disabled.

The complete and correct three address bytes and the confirmation byte must be clocked into

the device before the CS pin is deasserted, and the CS pin must be deasserted on an even byte

boundary (multiples of eight bits); otherwise, the device will abort the operation. When the

device aborts the Freeze Sector Lockdown State operation, the WEL bit in the Status Register

will be reset to a logical “0”; however, the state of the SLE bit will be unchanged.

SCK

MSB

00110011

839

37 38

31 32

29 30

OPCODE

HIGH-IMPEDANCE

AAA

MSB

1101000

ADDRESS BITS A23-A0

CONFIRMATION BYTE IN

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