LTC4261IGN datasheet(15/32 Pages) LINER

15 / 32 page

LTC4261/LTC4261-2

42612fb

6. The voltage at INTVCC is lower than 4.25V (INTVCC

undervoltage lockout).

7. VSENSE > 50mV and the condition lasts longer than

530µs (overcurrent fault).

8. The PGI pin is high when the PGI check timer expires

(power bad fault).

For conditions 1, 2, 5, 6, after the condition is cleared,

the LTC4261/LTC4261-2 will automatically enter the FET

turn-on sequence as previously described.

For any of the fault conditions 3, 4, 7, 8, the FET off

mode is programmable by the corresponding auto-retry

bit in the CONTROL register. If the auto-retry bit is set

to 0, the FET is latched off upon the fault condition. If

the auto-retry bit is set to 1, after the fault condition is

cleared, a delay timer is started. After the timer expires,

the FET enters the auto-retry mode and GATE is pulled

up. The auto-retry delay following the undervoltage fault

or the power bad fault has a duration of tD. The auto-

retry delay following the overcurrent fault has a duration

of 4tD for extra cooling time. The auto-retry following the

overvoltage fault does not have a delay. The auto-retry

control bits and their defaults at power up are listed in

Table 6. Note that the LTC4261 defaults to latch-off while

the LTC4261-2 defaults to auto-retry following the over-

current fault.

RTN_VEE

TMR

UVH

START-UP DELAY

GATE

VOUT

SENSE

PGIO

PGI

INTERNAL

PWRGD

VZ – 1.2V

1.77V

PWRGD1

DELAY

PWRGD2

DELAY

PGI CHECK

DELAY

50mV

INRUSH

LOAD 1

LATCHED

PWRGD1

READY

LOAD 1 + LOAD 2

PWRGD2

READY

NORMAL PGI

POWER BAD

42612 F03

Figure 3. LTC4261 Turn-On Sequence

APPLICATIONS INFORMATION

LTC4261IGN Datenblatt(PDF) 15 Page - Linear Technology

LTC4261IGN Datenblatt(HTML) 15 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

Datenblatt Download

Link URL