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CY7C024-35AI Datenblatt(PDF) 10 Page - Cypress Semiconductor

Teilenummer CY7C024-35AI
Bauteilbeschribung  4K x 16/18 and 8K x 16/18 Dual-Port Static RAM with SEM, INT, BUSY
PDF  21 Pages
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Hersteller  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7C024-35AI Datenblatt(HTML) 10 Page - Cypress Semiconductor

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CY7C024/024A/0241
CY7C025/0251
Document #: 38-06035 Rev. *D
Page 10 of 21
Data Retention Mode
The CY7C024/024A/0241 is designed with battery backup in
mind. Data retention voltage and supply current are guaranteed
over temperature. The following rules insure data retention:
1. Chip enable (CE) must be held HIGH during data retention,
within VCC to VCC – 0.2V.
2. CE must be kept between VCC – 0.2V and 70% of VCC during
the power up and power down transitions.
3. The RAM can begin operation >tRC after VCC reaches the
minimum operating voltage (4.5V).
Busy Timing[20]
tBLA
BUSY LOW from Address
Match
15
20
20
45
ns
tBHA
BUSY HIGH from Address
Mismatch
15
20
20
40
ns
tBLC
BUSY LOW from CE LOW
15
20
20
40
ns
tBHC
BUSY HIGH from CE HIGH
15
20
20
35
ns
tPS
Port Setup for Priority
5
5
5
5
ns
tWB
R/W HIGH after BUSY (Slave)
0
0
0
0
ns
tWH
R/W HIGH after BUSY HIGH
(Slave)
13
20
30
40
ns
tBDD
[21]
BUSY HIGH to Data Valid
Note 21
Note 21
Note 21
Note 21
ns
Interrupt Timing[20]
tINS
INT Set Time
15
20
25
30
ns
tINR
INT Reset Time
15
20
25
30
ns
Semaphore Timing
tSOP
SEM Flag Update Pulse (OE or
SEM)
10
12
15
20
ns
tSWRD
SEM Flag Write to Read Time
5
10
10
15
ns
tSPS
SEM Flag Contention Window
5
10
10
15
ns
tSAA
SEM Address Access Time
15
25
35
55
ns
Switching Characteristics Over the Operating Range (continued)[14]
Parameter
Description
7C024/024A/0241–15
7C025/0251–15
7C024/024A/0241–25
7C025/0251–25
7C024/024A/0241–35
7C025/0251–35
7C024/024A/0241–55
7C025/0251–55
Unit
Min
Max
Min
Max
Min
Max
Min
Max
Timing
Parameter
Test Conditions[22]
Max
Unit
ICCDR1
At VCCDR = 2V
1.5
mA
Data Retention Mode
4.5V
4.5V
VCC > 2.0V
VCC to VCC – 0.2V
VCC
CE
tRC
V
IH
Notes
20. Test conditions used are Load 2.
21. tBDD is a calculated parameter and is the greater of tWDD– tPWE (actual) or tDDD– tSD (actual).
22. CE = VCC, Vin = GND to VCC, TA = 25°C. This parameter is guaranteed but not tested.
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